mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2025-02-24 16:28:46 +00:00
Convert IPQ40xx boards to DSA setup. Signed-off-by: Leon M. George <leon@georgemail.eu> Signed-off-by: Lech Perczak <lech.perczak@gmail.com> Signed-off-by: Nick Hainke <vincent@systemli.org> Signed-off-by: ChunAm See <z1250747241@gmail.com> Signed-off-by: Jeff Kletsky <git-commits@allycomm.com> Signed-off-by: Andrew Sim <andrewsimz@gmail.com> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
381 lines
6.7 KiB
Plaintext
381 lines
6.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
|
|
|
|
#include "qcom-ipq4019.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/soc/qcom,tcsr.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
|
|
/ {
|
|
model = "Netgear WAC510";
|
|
compatible = "netgear,wac510";
|
|
|
|
aliases {
|
|
led-boot = &led_power_amber;
|
|
led-failsafe = &led_power_amber;
|
|
led-running = &led_power_green;
|
|
led-upgrade = &led_power_amber;
|
|
ethernet1 = &swport5;
|
|
};
|
|
|
|
chosen {
|
|
bootargs-append = " root=/dev/ubiblock0_1";
|
|
};
|
|
|
|
soc {
|
|
rng@22000 {
|
|
status = "okay";
|
|
};
|
|
|
|
counter@4a1000 {
|
|
compatible = "qcom,qca-gcnt";
|
|
reg = <0x4a1000 0x4>;
|
|
};
|
|
|
|
tcsr@1949000 {
|
|
compatible = "qcom,tcsr";
|
|
reg = <0x1949000 0x100>;
|
|
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
|
|
};
|
|
|
|
ess_tcsr@1953000 {
|
|
compatible = "qcom,tcsr";
|
|
reg = <0x1953000 0x1000>;
|
|
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
|
|
};
|
|
|
|
tcsr@1957000 {
|
|
compatible = "qcom,tcsr";
|
|
reg = <0x1957000 0x100>;
|
|
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
|
|
};
|
|
|
|
crypto@8e3a000 {
|
|
status = "okay";
|
|
};
|
|
|
|
watchdog@b017000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
led_spi {
|
|
compatible = "spi-gpio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
|
|
mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
|
|
num-chipselects = <0>;
|
|
|
|
ssr: ssr@0 {
|
|
compatible = "fairchild,74hc595";
|
|
reg = <0>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
registers-number = <1>;
|
|
spi-max-frequency = <1000000>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_power_amber: led-0 {
|
|
label = "amber:power";
|
|
color = <LED_COLOR_ID_AMBER>;
|
|
function = LED_FUNCTION_POWER;
|
|
gpios = <&ssr 6 GPIO_ACTIVE_LOW>;
|
|
panic-indicator;
|
|
};
|
|
|
|
led_power_green: led-1 {
|
|
label = "green:power";
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_POWER;
|
|
gpios = <&ssr 5 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led-2 {
|
|
/* 2.4GHz blue - activity */
|
|
color = <LED_COLOR_ID_BLUE>;
|
|
function = LED_FUNCTION_WLAN;
|
|
function-enumerator = <0>;
|
|
gpios = <&ssr 4 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
led-3 {
|
|
/* 2.4GHz green - link */
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_WLAN;
|
|
function-enumerator = <0>;
|
|
gpios = <&ssr 3 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0radio";
|
|
};
|
|
|
|
led-4 {
|
|
/* 5GHz blue - activity */
|
|
color = <LED_COLOR_ID_BLUE>;
|
|
function = LED_FUNCTION_WLAN;
|
|
function-enumerator = <1>;
|
|
gpios = <&ssr 2 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy1tpt";
|
|
};
|
|
|
|
led-5 {
|
|
/* 5GHz green - link */
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_WLAN;
|
|
function-enumerator = <1>;
|
|
gpios = <&ssr 1 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy1radio";
|
|
};
|
|
|
|
led-6 {
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_ACTIVITY;
|
|
gpios = <&ssr 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&qpic_bam {
|
|
status = "okay";
|
|
};
|
|
|
|
&tlmm {
|
|
mdio_pins: mdio_pinmux {
|
|
mux_1 {
|
|
pins = "gpio53";
|
|
function = "mdio";
|
|
bias-pull-up;
|
|
};
|
|
|
|
mux_2 {
|
|
pins = "gpio52";
|
|
function = "mdc";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
serial_pins: serial_pinmux {
|
|
mux {
|
|
pins = "gpio60", "gpio61";
|
|
function = "blsp_uart0";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
spi_0_pins: spi_0_pinmux {
|
|
pinmux {
|
|
function = "blsp_spi0";
|
|
pins = "gpio55", "gpio56", "gpio57";
|
|
drive-strength = <12>;
|
|
bias-disable;
|
|
};
|
|
|
|
pinmux_cs {
|
|
function = "gpio";
|
|
pins = "gpio54", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
&blsp_dma {
|
|
status = "okay";
|
|
};
|
|
|
|
&blsp1_spi1 {
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&spi_0_pins>;
|
|
pinctrl-names = "default";
|
|
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
|
|
<&tlmm 59 GPIO_ACTIVE_HIGH>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "0:SBL1";
|
|
reg = <0x00000000 0x00040000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "0:MIBIB";
|
|
reg = <0x00040000 0x00020000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@60000 {
|
|
label = "0:QSEE";
|
|
reg = <0x00060000 0x00060000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@c0000 {
|
|
label = "0:CDT";
|
|
reg = <0x000c0000 0x00010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@d0000 {
|
|
label = "0:DDRPARAMS";
|
|
reg = <0x000d0000 0x00010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@e0000 {
|
|
label = "0:APPSBLENV";
|
|
reg = <0x000e0000 0x00010000>;
|
|
};
|
|
|
|
partition@f0000 {
|
|
label = "0:APPSBL";
|
|
reg = <0x000f0000 0x000f0000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@1e0000 {
|
|
label = "0:MANUDATA";
|
|
reg = <0x001e0000 0x00010000>;
|
|
read-only;
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_manudata_6: macaddr@6 {
|
|
reg = <0x6 0x6>;
|
|
};
|
|
};
|
|
|
|
partition@1f0000 {
|
|
label = "0:ART";
|
|
reg = <0x001f0000 0x00010000>;
|
|
read-only;
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
precal_art_1000: precal@1000 {
|
|
reg = <0x1000 0x2f20>;
|
|
};
|
|
|
|
precal_art_5000: precal@5000 {
|
|
reg = <0x5000 0x2f20>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
nand@1 {
|
|
compatible = "spi-nand";
|
|
reg = <1>;
|
|
spi-max-frequency = <48000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "rootfs";
|
|
reg = <0x00000000 0x03800000>;
|
|
};
|
|
|
|
partition@3800000 {
|
|
label = "rootfs_1";
|
|
reg = <0x03800000 0x03800000>;
|
|
};
|
|
|
|
partition@7000000 {
|
|
label = "var_config";
|
|
reg = <0x07000000 0x00f00000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@7f00000 {
|
|
label = "Oops_log";
|
|
reg = <0x07f00000 0x000c0000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&blsp1_uart1 {
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&serial_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&cryptobam {
|
|
status = "okay";
|
|
};
|
|
|
|
&gmac {
|
|
status = "okay";
|
|
};
|
|
|
|
&switch {
|
|
status = "okay";
|
|
};
|
|
|
|
&swport4 {
|
|
status = "okay";
|
|
|
|
label = "lan";
|
|
};
|
|
|
|
&swport5 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mdio {
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&mdio_pins>;
|
|
pinctrl-names = "default";
|
|
reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
|
|
reset-delay-us = <2000>;
|
|
};
|
|
|
|
&wifi0 {
|
|
status = "okay";
|
|
nvmem-cell-names = "pre-calibration", "mac-address";
|
|
nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6>;
|
|
qcom,ath10k-calibration-variant = "Netgear-WAC510";
|
|
};
|
|
|
|
&wifi1 {
|
|
status = "okay";
|
|
nvmem-cell-names = "pre-calibration", "mac-address";
|
|
nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6>;
|
|
mac-address-increment = <16>;
|
|
qcom,ath10k-calibration-variant = "Netgear-WAC510";
|
|
};
|