mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-11-22 04:56:15 +00:00
487ca61f91
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.61 Manually rebased: bcm27xx/patches-6.6/950-0998-i2c-designware-Add-support-for-bus-clear-feature.patch All other patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/16959 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
568 lines
12 KiB
Diff
568 lines
12 KiB
Diff
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
|
|
@@ -0,0 +1,554 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+/*
|
|
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
|
+ *
|
|
+ * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
|
|
+ * (http://www.friendlyelec.com)
|
|
+ *
|
|
+ * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/leds/common.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+#include <dt-bindings/soc/rockchip,vop2.h>
|
|
+#include "rk3566.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "FriendlyElec NanoPi R3S";
|
|
+ compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
|
|
+
|
|
+ aliases {
|
|
+ ethernet0 = &gmac1;
|
|
+ mmc0 = &sdhci;
|
|
+ mmc1 = &sdmmc0;
|
|
+ };
|
|
+
|
|
+ chosen: chosen {
|
|
+ stdout-path = "serial2:1500000n8";
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&reset_button_pin>;
|
|
+
|
|
+ button-reset {
|
|
+ label = "reset";
|
|
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <50>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&power_led_pin>, <&lan_led_pin>, <&wan_led_pin>;
|
|
+
|
|
+ power_led: led-0 {
|
|
+ color = <LED_COLOR_ID_RED>;
|
|
+ function = LED_FUNCTION_POWER;
|
|
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "on";
|
|
+ };
|
|
+
|
|
+ lan_led: led-1 {
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ function = LED_FUNCTION_LAN;
|
|
+ gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ wan_led: led-2 {
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ function = LED_FUNCTION_WAN;
|
|
+ gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sys: regulator-vcc3v3-sys {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc3v3_sys";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vcc5v0_sys: regulator-vcc5v0-sys {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc5v0_sys";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ vin-supply = <&vdd_usbc>;
|
|
+ };
|
|
+
|
|
+ vcc5v0_usb: regulator-vcc5v0_usb {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-high;
|
|
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
|
|
+ regulator-name = "vcc5v0_usb";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vdd_usbc: regulator-vdd-usbc {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vdd_usbc";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&combphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&combphy2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&cpu0 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu1 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu2 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu3 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&gmac1 {
|
|
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
|
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
|
+ assigned-clock-rates = <0>, <125000000>;
|
|
+ clock_in_out = "output";
|
|
+ phy-mode = "rgmii-id";
|
|
+ phy-handle = <&rgmii_phy1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac1m0_miim
|
|
+ &gmac1m0_tx_bus2_level3
|
|
+ &gmac1m0_rx_bus2
|
|
+ &gmac1m0_rgmii_clk_level2
|
|
+ &gmac1m0_rgmii_bus_level3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpu {
|
|
+ mali-supply = <&vdd_gpu>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ status = "okay";
|
|
+
|
|
+ vdd_cpu: regulator@1c {
|
|
+ compatible = "tcs,tcs4525";
|
|
+ reg = <0x1c>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ regulator-name = "vdd_cpu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <800000>;
|
|
+ regulator-max-microvolt = <1150000>;
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rk809: pmic@20 {
|
|
+ compatible = "rockchip,rk809";
|
|
+ reg = <0x20>;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ #clock-cells = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_int>;
|
|
+ system-power-controller;
|
|
+ vcc1-supply = <&vcc3v3_sys>;
|
|
+ vcc2-supply = <&vcc3v3_sys>;
|
|
+ vcc3-supply = <&vcc3v3_sys>;
|
|
+ vcc4-supply = <&vcc3v3_sys>;
|
|
+ vcc5-supply = <&vcc3v3_sys>;
|
|
+ vcc6-supply = <&vcc3v3_sys>;
|
|
+ vcc7-supply = <&vcc3v3_sys>;
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
|
+ vcc9-supply = <&vcc3v3_sys>;
|
|
+ wakeup-source;
|
|
+
|
|
+ regulators {
|
|
+ vdd_logic: DCDC_REG1 {
|
|
+ regulator-name = "vdd_logic";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_gpu: DCDC_REG2 {
|
|
+ regulator-name = "vdd_gpu";
|
|
+ regulator-always-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_npu: DCDC_REG4 {
|
|
+ regulator-name = "vdd_npu";
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: DCDC_REG5 {
|
|
+ regulator-name = "vcc_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_image: LDO_REG1 {
|
|
+ regulator-name = "vdda0v9_image";
|
|
+ regulator-min-microvolt = <950000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v9: LDO_REG2 {
|
|
+ regulator-name = "vdda_0v9";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_pmu: LDO_REG3 {
|
|
+ regulator-name = "vdda0v9_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <900000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_acodec: LDO_REG4 {
|
|
+ regulator-name = "vccio_acodec";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd: LDO_REG5 {
|
|
+ regulator-name = "vccio_sd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_pmu: LDO_REG6 {
|
|
+ regulator-name = "vcc3v3_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG7 {
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pmu: LDO_REG8 {
|
|
+ regulator-name = "vcca1v8_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_image: LDO_REG9 {
|
|
+ regulator-name = "vcca1v8_image";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3: SWITCH_REG1 {
|
|
+ regulator-name = "vcc_3v3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sd: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_sd";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "okay";
|
|
+
|
|
+ hym8563: rtc@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "hym8563";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hym8563_int>;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ interrupt-parent = <&gpio4>;
|
|
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð_phy_reset_pin>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <100000>;
|
|
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_reset_h>;
|
|
+ reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ gpio-leds {
|
|
+ lan_led_pin: lan-led-pin {
|
|
+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ power_led_pin: power-led-pin {
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wan_led_pin: wan-led-pin {
|
|
+ rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac {
|
|
+ eth_phy_reset_pin: eth-phy-reset-pin {
|
|
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_reset_h: pcie-reset-h {
|
|
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int: pmic-int {
|
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rockchip-key {
|
|
+ reset_button_pin: reset-button-pin {
|
|
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rtc {
|
|
+ hym8563_int: hym8563-int {
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ vcc5v0_usb_host_en: vcc5v0-usb-host-en {
|
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
|
+ vccio1-supply = <&vccio_acodec>;
|
|
+ vccio2-supply = <&vcc_1v8>;
|
|
+ vccio3-supply = <&vccio_sd>;
|
|
+ vccio4-supply = <&vcc_3v3>;
|
|
+ vccio5-supply = <&vcc_1v8>;
|
|
+ vccio6-supply = <&vcc_3v3>;
|
|
+ vccio7-supply = <&vcc_3v3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ max-frequency = <200000000>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc0 {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ no-sdio;
|
|
+ no-mmc;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
+ sd-uhs-sdr50;
|
|
+ vmmc-supply = <&vcc3v3_sd>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_host {
|
|
+ phy-supply = <&vcc5v0_usb>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ extcon = <&usb2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
|
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
|
@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-an
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
|
|
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-nanopi-r3s.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
|