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59fc334ed0
Radxa ZERO 3E and 3W are light, compact and tiny SBC[1][2] using the Rockchip RK3566. Hardware -------- - Rockchip RK3566 SoC - Quad A55 CPU - Mali-G52-2EE GPU - 1 TOPS @ INT8 NPU - 1GB/2GB/4GB/8G LPDDR4 RAM - Optional 8GB/16GB/32GB/64GB eMMC (3E) - Micro SD Card slot - 1x Gigabit ethernet port (supports PoE with add-on PoE HAT) (3E) - WiFi6/BT5.4 (3W) (not supported yet on OpenWrt) - 1x USB 3.0 Type-C HOST port - 1x USB 2.0 Type-C OTG port - Optional 40 Pin GPIO header [1] https://radxa.com/products/zeros/zero3e [2] https://radxa.com/products/zeros/zero3w Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/16185 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
102 lines
3.1 KiB
Diff
102 lines
3.1 KiB
Diff
From f7c742cbe664ebdedc075945e75443683d1175f7 Mon Sep 17 00:00:00 2001
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From: Trevor Woerner <twoerner@gmail.com>
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Date: Wed, 19 Jun 2024 21:32:49 -0400
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Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to radxa-zero-3
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Add names to the pins of the general-purpose expansion header as given
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in the Radxa documentation[1] following the conventions in the kernel[2]
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to make it easier for users to correlate pins with functions when using
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utilities such as 'gpioinfo'.
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[1] https://docs.radxa.com/en/zero/zero3/hardware-design/hardware-interface
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[2] https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt
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Signed-off-by: Trevor Woerner <twoerner@gmail.com>
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Link: https://lore.kernel.org/r/20240620013301.33653-1-twoerner@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../dts/rockchip/rk3566-radxa-zero-3.dtsi | 72 +++++++++++++++++++
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1 file changed, 72 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
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@@ -105,6 +105,78 @@
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cpu-supply = <&vdd_cpu>;
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};
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+&gpio0 {
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+ gpio-line-names =
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+ /* GPIO0_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_D0 - D7 */
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+ "pin-10 [GPIO0_D0]", "pin-08 [GPIO0_D1]", "",
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+ "", "", "", "", "";
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+};
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+
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+&gpio1 {
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+ gpio-line-names =
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+ /* GPIO1_A0 - A7 */
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+ "pin-03 [GPIO1_A0]", "pin-05 [GPIO1_A1]", "",
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+ "", "pin-37 [GPIO1_A4]", "",
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+ "", "",
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+ /* GPIO1_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio2 {
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+ gpio-line-names =
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+ /* GPIO2_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio3 {
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+ gpio-line-names =
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+ /* GPIO3_A0 - A7 */
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+ "", "pin-11 [GPIO3_A1]", "pin-13 [GPIO3_A2]",
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+ "pin-12 [GPIO3_A3]", "pin-35 [GPIO3_A4]", "pin-40 [GPIO3_A5]",
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+ "pin-38 [GPIO3_A6]", "pin-36 [GPIO3_A7]",
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+ /* GPIO3_B0 - B7 */
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+ "pin-15 [GPIO3_B0]", "pin-16 [GPIO3_B1]", "pin-18 [GPIO3_B2]",
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+ "pin-29 [GPIO3_B3]", "pin-31 [GPIO3_B4]", "",
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+ "", "",
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+ /* GPIO3_C0 - C7 */
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+ "", "pin-22 [GPIO3_C1]", "pin-32 [GPIO3_C2]",
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+ "pin-33 [GPIO3_C3]", "pin-07 [GPIO3_C4]", "",
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+ "", "",
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+ /* GPIO3_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio4 {
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+ gpio-line-names =
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+ /* GPIO4_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO4_B0 - B7 */
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+ "", "", "pin-27 [GPIO4_B2]",
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+ "pin-28 [GPIO4_B3]", "", "", "", "",
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+ /* GPIO4_C0 - C7 */
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+ "", "", "pin-23 [GPIO4_C2]",
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+ "pin-19 [GPIO4_C3]", "", "pin-21 [GPIO4_C5]",
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+ "pin-24 [GPIO4_C6]", "",
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+ /* GPIO4_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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&gpu {
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mali-supply = <&vdd_gpu_npu>;
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status = "okay";
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