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openwrt/target/linux/realtek/dts/rtl9303_tplink_tl-st1008f_v2.dts
Markus Stockhausen 17822d5d18 realtek: use consistent definition in DTS for SFP(+) ports 
We are slowly getting to the point where the mdio driver will be
carved out from the ethernet driver. Since the beginning it had
the feature to hand out SFP serdes as phys. So one can access
them from the phy driver. This will be kept during the final
migration and it even will provide a consistent interface for the
phy/serdes registers.

With this being done we need to identify how to handle the affected
ports in a generic way for all targets. Doing first things first,
this starts with a consistent DTS. Currently we have:

for RTL838x + Zyxel XGS1210:
  phy-mode = "1000base-x"
  managed = "in-band-status"
  phy-handle = ...

for all other RTL93x devices:
  phy-mode = "10gbase-r"
  managed = "in-band-status"
  pseudo-phy-handle = ...

Looking at the phylink kernel code one can see a nifty detail.
There is dynamic phy bringup depending on the mode.

int phylink_fwnode_phy_connect(struct phylink *pl,
                               const struct fwnode_handle *fwnode,
                               u32 flags)
{
        struct fwnode_handle *phy_fwnode;
        struct phy_device *phy_dev;
        int ret;

        /* Fixed links and 802.3z are handled without needing a PHY */
        if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
            (pl->cfg_link_an_mode == MLO_AN_INBAND &&
             phy_interface_mode_is_8023z(pl->link_interface)))
                return 0;
        ...
}

Where 802.3z means 1000base-x or 2500base-x. Aligning this with
IEEE specs it means essentially:

- 10gbase-r defined ports with phy-handle must statically bring up
  a phylink from the beginning that immediately depends on a
  phy read_status() implementation.

- 1000base-x/2500base-x defined ports will dynamically bringup a
  phylink during link detection regardless of a phy-handle. So
  it usually runs at the moment when a SFP has been plugged in.

We currently still rely on a phy-handle but do not want to bring
up the phy immediately. Commit 4457c1eee4 ("realtek: rtl93xx:
support SFPs with phys") tried to fix exactly that error for
10gbase-r definied ports. Kernel shows "sfp sfp-p8: sfp_add_phy
failed: -EBUSY" in that case.

But it did it in the wrong way. It implemented a workaround by
introducing a DTS property "pseudo-phy-handle". Instead it
should have simply converted the DTS nodes to 1000base-x.

Revert the commit and fix the DTS with wrong definitions. From
now on we have a consistent SFP definition throughout all DTS
and targets.

Aside from the positive effect this setting has it is more or
less an arbitrary speed definition. When plugging in the SFP the
real speed will be choosen dynamically.

Fixes: 4457c1eee4 ("realtek: rtl93xx: support SFPs with phys")
Tested-By: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19648
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-08-07 13:47:27 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later
#include "rtl930x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "tplink,tl-st1008f,v2", "realtek,rtl930x-soc";
model = "TP-Link TL-ST1008F v2.0";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>, /* first 256 MiB */
<0x20000000 0x10000000>; /* remaining 256 MiB */
};
chosen {
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
m1 {
label = "M1";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
debounce-interval = <50>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
m2 {
label = "M2";
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
debounce-interval = <50>;
linux,code = <BTN_1>;
linux,input-type = <EV_SW>;
};
m3 {
label = "M3";
gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
debounce-interval = <50>;
linux,code = <BTN_2>;
linux,input-type = <EV_SW>;
};
};
led_set {
compatible = "realtek,rtl9300-leds";
active-high;
led_set0 = <0x0ba0 0x0a08 0x0a01>;
};
i2c_gpio {
compatible = "i2c-gpio";
#address-cells = <1>;
#size-cells = <0>;
i2c-gpio,delay-us = <2>;
scl-gpios = <&gpio0 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
gpioexp0: i2c@38 {
reg = <0x38>;
compatible = "nxp,pca9534";
gpio-controller;
#gpio-cells = <2>;
};
};
i2c_main: i2c@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
#size-cells = <0>;
scl-pin = <8>;
sda-pin = <9>;
clock-frequency = <100000>;
};
i2c-mux {
compatible = "realtek,i2c-mux-rtl9300";
i2c-parent = <&i2c_main>;
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@0 {
reg = <0>;
scl-pin = <8>;
sda-pin = <9>;
};
i2c1: i2c@1 {
reg = <1>;
scl-pin = <8>;
sda-pin = <10>;
};
i2c2: i2c@2 {
reg = <2>;
scl-pin = <8>;
sda-pin = <11>;
};
i2c3: i2c@3 {
reg = <3>;
scl-pin = <8>;
sda-pin = <12>;
};
i2c4: i2c@4 {
reg = <4>;
scl-pin = <8>;
sda-pin = <13>;
};
i2c5: i2c@5 {
reg = <5>;
scl-pin = <8>;
sda-pin = <14>;
};
i2c6: i2c@6 {
reg = <6>;
scl-pin = <8>;
sda-pin = <15>;
};
i2c7: i2c@7 {
reg = <7>;
scl-pin = <8>;
sda-pin = <16>;
};
};
sfp0: sfp-p1 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
mod-def0-gpio = <&gpio0 0 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 0 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2900>;
#thermal-sensor-cells = <0>;
};
sfp1: sfp-p2 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
mod-def0-gpio = <&gpio0 1 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 1 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
#thermal-sensor-cells = <0>;
};
sfp2: sfp-p3 {
compatible = "sff,sfp";
i2c-bus = <&i2c2>;
mod-def0-gpio = <&gpio0 2 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 2 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
#thermal-sensor-cells = <0>;
};
sfp3: sfp-p4 {
compatible = "sff,sfp";
i2c-bus = <&i2c3>;
mod-def0-gpio = <&gpio0 3 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 3 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
sfp4: sfp-p5 {
compatible = "sff,sfp";
i2c-bus = <&i2c4>;
mod-def0-gpio = <&gpio0 4 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 4 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
#thermal-sensor-cells = <0>;
};
sfp5: sfp-p6 {
compatible = "sff,sfp";
i2c-bus = <&i2c5>;
mod-def0-gpio = <&gpio0 5 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 5 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
#thermal-sensor-cells = <0>;
};
sfp6: sfp-p7 {
compatible = "sff,sfp";
i2c-bus = <&i2c6>;
mod-def0-gpio = <&gpio0 6 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 6 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <1500>;
#thermal-sensor-cells = <0>;
};
sfp7: sfp-p8 {
compatible = "sff,sfp";
i2c-bus = <&i2c7>;
mod-def0-gpio = <&gpio0 7 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpioexp0 7 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2900>;
#thermal-sensor-cells = <0>;
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <1200>;
always-running;
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0xe0000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0xe0000 0x10000>;
};
partition@f0000 {
label = "u-boot-env2";
reg = <0xf0000 0x10000>;
read-only;
};
partition@100000 {
label = "jffs2-cfg";
reg = <0x100000 0x100000>;
};
partition@200000 {
label = "jffs2-log";
reg = <0x200000 0x100000>;
};
partition@300000 {
compatible = "openwrt,uimage", "denx,uimage";
reg = <0x300000 0x1d00000>;
label = "firmware";
openwrt,ih-magic = <0x93030000>;
};
};
};
};
&ethernet0 {
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
regmap = <&ethernet0>;
#address-cells = <1>;
#size-cells = <0>;
INTERNAL_PHY_SDS(0, 2)
INTERNAL_PHY_SDS(8, 3)
INTERNAL_PHY_SDS(16, 4)
INTERNAL_PHY_SDS(20, 5)
INTERNAL_PHY_SDS(24, 6)
INTERNAL_PHY_SDS(25, 7)
INTERNAL_PHY_SDS(26, 8)
INTERNAL_PHY_SDS(27, 9)
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
phy-mode = "1000base-x";
phy-handle = <&phy0>;
sfp = <&sfp0>;
managed = "in-band-status";
led-set = <0>;
};
port@8 {
reg = <8>;
label = "lan2";
phy-mode = "1000base-x";
phy-handle = <&phy8>;
sfp = <&sfp1>;
managed = "in-band-status";
led-set = <0>;
};
port@10 {
reg = <16>;
label = "lan3";
phy-mode = "1000base-x";
phy-handle = <&phy16>;
sfp = <&sfp2>;
managed = "in-band-status";
led-set = <0>;
};
port@14 {
reg = <20>;
label = "lan4";
phy-mode = "1000base-x";
phy-handle = <&phy20>;
sfp = <&sfp3>;
managed = "in-band-status";
led-set = <0>;
};
port@18 {
reg = <24>;
label = "lan5";
phy-mode = "1000base-x";
phy-handle = <&phy24>;
sfp = <&sfp4>;
managed = "in-band-status";
led-set = <0>;
};
port@19 {
reg = <25>;
label = "lan6";
phy-mode = "1000base-x";
phy-handle = <&phy25>;
sfp = <&sfp5>;
managed = "in-band-status";
led-set = <0>;
};
port@1a {
reg = <26>;
label = "lan7";
phy-mode = "1000base-x";
phy-handle = <&phy26>;
sfp = <&sfp6>;
managed = "in-band-status";
led-set = <0>;
};
port@1b {
reg = <27>;
label = "lan8";
phy-mode = "1000base-x";
phy-handle = <&phy27>;
sfp = <&sfp7>;
managed = "in-band-status";
led-set = <0>;
};
port@1c {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};
&thermal_zones {
sfp-thermal {
polling-delay-passive = <10000>;
polling-delay = <10000>;
thermal-sensors = <&sfp0>, <&sfp1>, <&sfp2>, <&sfp3>, <&sfp4>, <&sfp5>, <&sfp6>, <&sfp7>;
trips {
sfp-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
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