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d7ed4c77b5
This converts all RT3662 and RT3883 devices to use interrupt based gpio-keys instead of gpio-keys-polled. The poll-interval will be removed. Signed-off-by: Shiji Yang <yangshiji66@qq.com> Link: https://github.com/openwrt/openwrt/pull/16764 Signed-off-by: Robert Marko <robimarko@gmail.com>
205 lines
3.4 KiB
Plaintext
205 lines
3.4 KiB
Plaintext
#include "rt3883.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "sitecom,wlr-6000", "ralink,rt3883-soc";
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model = "Sitecom WLR-6000";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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};
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ops {
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label = "white:ops";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usb {
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gpio-export,name = "usb";
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gpio-export,output = <1>;
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gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&state_default {
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gpio {
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groups = "i2c", "jtag", "uartf";
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function = "gpio";
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};
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};
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ðernet {
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status = "okay";
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nvmem-cells = <&macaddr_factory_8004 1>;
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nvmem-cell-names = "mac-address";
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port@0 {
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phy-handle = <&phy0>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0 PAD MODE CTRL */
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0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
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0x10 0x40000000 /* Power-on Strapping: 176-pin interface configuration */
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0x50 0xc437c437 /* LED Control Register 0 */
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0x54 0xc337c337 /* LED Control Register 1 */
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0x58 0x00000000 /* LED Control Register 2 */
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0x5c 0x03ffff00 /* LED Control Register 3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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0x94 0x0000007e /* PORT6 STATUS */
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>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <8600000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_8004: macaddr@8004 {
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compatible = "mac-base";
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reg = <0x8004 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x713000>;
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};
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partition@763000 {
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label = "manufacture";
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reg = <0x763000 0x7D000>;
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read-only;
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};
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partition@7E0000 {
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label = "backup";
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reg = <0x7E0000 0x10000>;
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read-only;
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};
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partition@7F0000 {
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label = "storage";
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reg = <0x7F0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pci {
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status = "okay";
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};
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&pci1 {
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status = "okay";
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wifi@0,0 {
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compatible = "pci1814,3091";
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reg = <0x10000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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};
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};
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&wmac {
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ralink,2ghz = <0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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