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c0e50ebaf7
Use realtek,extif property instead of realtek,extif0 to extif2 by extending it with the cpu_port parameter. The extif number is automatically calculated based on cpu_port. Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Link: https://github.com/openwrt/openwrt/pull/15749 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
220 lines
3.7 KiB
Plaintext
220 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "iodata,wn-ac733gr3", "ralink,mt7620a-soc";
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model = "I-O DATA WN-AC733GR3";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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notification {
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label = "green:notification";
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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};
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wlan2g {
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label = "green:wlan2g";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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wlan5g {
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label = "green:wlan5g";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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router {
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label = "router";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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auto {
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label = "auto";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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};
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rtl8367rb {
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compatible = "realtek,rtl8367b";
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gpio-sda = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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gpio-sck = <&gpio0 23 GPIO_ACTIVE_HIGH>;
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realtek,extif = <6 1 0 1 1 1 1 1 1 2>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x8000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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};
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partition@48000 {
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label = "iNIC_rf";
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reg = <0x48000 0x8000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_iNIC_rf_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x6d4000>;
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};
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partition@724000 {
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label = "manufacture";
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reg = <0x724000 0x8c000>;
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read-only;
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};
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partition@7b0000 {
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label = "backup";
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reg = <0x7b0000 0x10000>;
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read-only;
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};
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partition@7c0000 {
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label = "storage";
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reg = <0x7c0000 0x40000>;
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read-only;
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};
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins>;
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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port@5 {
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status = "okay";
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mediatek,fixed-link = <1000 1 1 1>;
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phy-mode = "rgmii";
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};
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};
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&gpio0 {
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rtl8367rb_reset {
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gpio-hog;
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gpios = <0 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "rtl8367rb-reset";
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uartf", "mdio";
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function = "gpio";
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_iNIC_rf_0>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&wmac {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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