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openwrt/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
Shiji Yang 73eeac49be ramips: limit max spi clock frequency to 50 MHz
In the past few years, we have received several reports about SPI
Flash not working properly. This is caused by excessively fast
clock frequency. It's really annoying to fix them one by one. Let's
reduce these aggressive frequencies to 50 MHz. This is a safe and
suggested value in the vendor SDK.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2024-07-10 12:20:35 +02:00

199 lines
3.3 KiB
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#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "dlink,dch-m225", "ralink,mt7620a-soc";
model = "D-Link DCH-M225";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
reset {
label = "reset";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
default-state = "on";
};
status {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Audio-I2S";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
simple-audio-card,widgets =
"Headphone", "Headphones";
simple-audio-card,routing =
"Headphones", "HP_L",
"Headphones", "HP_R";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,hp-det-gpio = <&gpio0 14 GPIO_ACTIVE_LOW>;
simple-audio-card,cpu {
sound-dai = <&i2s>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&codec>;
};
};
};
&gpio1 {
status = "okay";
};
&i2c {
status = "okay";
codec: wm8960@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8960";
reg = <0x1a>;
wlf,shared-lrclk;
};
};
&i2s {
#sound-dai-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_refclk_pins>;
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x4000>;
read-only;
};
partition@34000 {
label = "factory";
reg = <0x34000 0x4000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
partition@38000 {
label = "nvram";
reg = <0x38000 0x8000>;
read-only;
};
partition@40000 {
label = "devconf";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "upgrade_rec";
reg = <0x50000 0x100000>;
read-only;
};
partition@150000 {
compatible = "seama";
label = "firmware";
reg = <0x150000 0x6b0000>;
};
};
};
};
&gdma {
status = "okay";
};
&state_default {
gpio {
groups = "wdt", "rgmii1";
function = "gpio";
};
gpio_i2s {
groups = "uartf";
function = "gpio i2s";
};
};
&ethernet {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
};
&wmac {
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};