mirror of
https://git.openwrt.org/openwrt/openwrt.git
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4dd35ca674
Add WED related nodes to the device tree of the MT7988 SoC family. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
168 lines
4.3 KiB
Diff
168 lines
4.3 KiB
Diff
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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@@ -145,6 +145,32 @@
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reg = <0 0x43000000 0 0x50000>;
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no-map;
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};
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+
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+ wmcpu_emi: wmcpu-reserved@47cc0000 {
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+ reg = <0 0x47cc0000 0 0x00100000>;
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+ no-map;
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+ };
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+
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+ wo_emi0: wo-emi@4f600000 {
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+ reg = <0 0x4f600000 0 0x40000>;
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+ no-map;
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+ };
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+
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+ wo_emi1: wo-emi@4f640000 {
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+ reg = <0 0x4f640000 0 0x40000>;
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+ no-map;
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+ };
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+
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+ wo_emi2: wo-emi@4f680000 {
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+ reg = <0 0x4f680000 0 0x40000>;
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+ no-map;
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+ };
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+
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+ wo_data: wo-data@4f700000 {
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+ reg = <0 0x4f700000 0 0x800000>;
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+ no-map;
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+ shared = <1>;
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+ };
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};
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soc {
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@@ -867,6 +893,50 @@
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reg = <0 0x15000000 0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ };
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+
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+ wed0: wed@15010000 {
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+ compatible = "mediatek,mt7988-wed",
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+ "syscon";
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+ reg = <0 0x15010000 0 0x2000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
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+ memory-region = <&wo_emi0>, <&wo_data>;
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+ memory-region-names = "wo-emi", "wo-data";
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+ mediatek,wo-ccif = <&wo_ccif0>;
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+ mediatek,wo-ilm = <&wo_ilm0>;
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+ mediatek,wo-dlm = <&wo_dlm0>;
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+ mediatek,wo-cpuboot = <&wo_cpuboot0>;
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+ };
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+
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+ wed1: wed@15012000 {
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+ compatible = "mediatek,mt7988-wed",
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+ "syscon";
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+ reg = <0 0x15012000 0 0x2000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
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+ memory-region = <&wo_emi1>, <&wo_data>;
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+ memory-region-names = "wo-emi", "wo-data";
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+ mediatek,wo-ccif = <&wo_ccif1>;
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+ mediatek,wo-ilm = <&wo_ilm1>;
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+ mediatek,wo-dlm = <&wo_dlm1>;
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+ mediatek,wo-cpuboot = <&wo_cpuboot1>;
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+ };
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+
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+ wed2: wed@15014000 {
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+ compatible = "mediatek,mt7988-wed",
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+ "syscon";
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+ reg = <0 0x15014000 0 0x2000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
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+ memory-region = <&wo_emi2>, <&wo_data>;
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+ memory-region-names = "wo-emi", "wo-data";
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+ mediatek,wo-ccif = <&wo_ccif2>;
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+ mediatek,wo-ilm = <&wo_ilm2>;
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+ mediatek,wo-dlm = <&wo_dlm2>;
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+ mediatek,wo-cpuboot = <&wo_cpuboot2>;
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};
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switch: switch@15020000 {
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@@ -1086,6 +1156,7 @@
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<&apmixedsys CLK_APMIXED_SGMPLL>;
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mediatek,ethsys = <ðsys>;
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mediatek,infracfg = <&topmisc>;
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+ mediatek,wed = <&wed0>, <&wed1>, <&wed2>;
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -1147,6 +1218,72 @@
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};
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};
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+ wo_ccif0: syscon@151a5000 {
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+ compatible = "mediatek,mt7988-wo-ccif", "syscon";
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+ reg = <0 0x151a5000 0 0x1000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ wo_ccif1: syscon@152a5000 {
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+ compatible = "mediatek,mt7988-wo-ccif", "syscon";
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+ reg = <0 0x152a5000 0 0x1000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ wo_ccif2: syscon@153a5000 {
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+ compatible = "mediatek,mt7988-wo-ccif", "syscon";
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+ reg = <0 0x153a5000 0 0x1000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ wo_ilm0: syscon@151e0000 {
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+ compatible = "mediatek,mt7988-wo-ilm", "syscon";
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+ reg = <0 0x151e0000 0 0x8000>;
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+ };
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+
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+ wo_ilm1: syscon@152e0000 {
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+ compatible = "mediatek,mt7988-wo-ilm", "syscon";
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+ reg = <0 0x152e0000 0 0x8000>;
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+ };
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+
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+ wo_ilm2: syscon@153e0000 {
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+ compatible = "mediatek,mt7988-wo-ilm", "syscon";
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+ reg = <0 0x153e0000 0 0x8000>;
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+ };
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+
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+ wo_dlm0: syscon@151e8000 {
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+ compatible = "mediatek,mt7988-wo-dlm", "syscon";
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+ reg = <0 0x151e8000 0 0x2000>;
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+ };
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+
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+ wo_dlm1: syscon@152e8000 {
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+ compatible = "mediatek,mt7988-wo-dlm", "syscon";
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+ reg = <0 0x152e8000 0 0x2000>;
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+ };
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+
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+ wo_dlm2: syscon@153e8000 {
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+ compatible = "mediatek,mt7988-wo-dlm", "syscon";
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+ reg = <0 0x153e8000 0 0x2000>;
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+ };
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+
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+ wo_cpuboot0: syscon@15194000 {
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+ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
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+ reg = <0 0x15194000 0 0x1000>;
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+ };
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+
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+ wo_cpuboot1: syscon@15294000 {
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+ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
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+ reg = <0 0x15294000 0 0x1000>;
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+ };
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+
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+ wo_cpuboot2: syscon@15394000 {
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+ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
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+ reg = <0 0x15394000 0 0x1000>;
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+ };
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+
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crypto: crypto@15600000 {
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compatible = "inside-secure,safexcel-eip197b";
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reg = <0 0x15600000 0 0x180000>;
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