mirror of
				https://git.openwrt.org/openwrt/openwrt.git
				synced 2025-11-04 15:58:43 +00:00 
			
		
		
		
	Product name: Acer Predator Connect W6x
Product link: https://www.acer.com/us-en/predator/networking/wi-fi/predator-connect-w6x/pdp/FF.G2TTA.001
* Specifications:
SOC: MT7986AV
RAM: 1024MB
Flash: 256 MB SPI NAND
Ports: 4 LAN (1G) & 1 WAN (2.5G)
WIFI: MT7976GN + MT7976AN
LED: 1, ws2812b controller
** This commit includes a fix for the GPIO pins for factory/reset and WPS. It was reversed and is now fixed.
* U-Boot Mod Openwrt Installation via UART:
Openwrt Stock Layout Commit: 6e04dccb7a
NOTE: Stock Openwrt is not necessary. You can go straight to ubootmod version of the firmware. However, it is recommended to follow stock layout instructions to backup NAND.
1. Configure TFTP server with IP 192.168.1.66. Copy `openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-initramfs-recovery.itb` to TFTP root and rename to `predator.bin`
2. Interrupt boot by pressing 0 on startup or select `U-Boot Console` in U-Boot Boot Menu.
3. Run setenv `serverip 192.168.1.66; setenv ipaddr 192.168.1.1; tftpboot 0x46000000 predator.bin; bootm` in uboot console.
4. Wait for boot complete on Openwrt initramfs env.
5. Transfer `openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-initramfs-recovery.itb`,
		`openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-squashfs-sysupgrade.itb`,
		`openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-bl31-uboot.fip`,
		`openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-preloader.bin` to router's /tmp/ directory.
6. run `ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5`
7. run `ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB`
8. run `ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB`
9. run `ubimkvol /dev/ubi0 -n 2 -N recovery -s 10MiB`
10. run `ubiupdatevol /dev/ubi0_2 /tmp/openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-initramfs-recovery.itb`
11. install kmod-mtd-rw via opkg or apk.
12. run `insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1`
13. run `mtd write /tmp/openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-preloader.bin bl2`
14. run `mtd write /tmp/openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-bl31-uboot.fip fip`
15. run `sysupgrade -n /tmp/openwrt-mediatek-filogic-acer_predator-w6x-ubootmod-squashfs-sysupgrade.itb`
16. reboot to ubootmod layout
MTD layout before ubootmod:
```
dev:    size   erasesize  name
mtd0: 00100000 00020000 "bl2"
mtd1: 00080000 00020000 "u-boot-env"
mtd2: 00200000 00020000 "factory"
mtd3: 00200000 00020000 "fip"
mtd4: 00020000 00020000 "prod"
mtd5: 00100000 00020000 "dual"
mtd6: 00100000 00020000 "pot"
mtd7: 06400000 00020000 "ubi"
mtd8: 06400000 00020000 "ubi1"
mtd9: 00800000 00020000 "storage"
```
MTD layout after ubootmod:
```
dev:    size   erasesize  name
mtd0: 00100000 00020000 "bl2"
mtd1: 00080000 00020000 "u-boot-env"
mtd2: 00200000 00020000 "factory"
mtd3: 00200000 00020000 "fip"
mtd4: 00020000 00020000 "prod"
mtd5: 0d200000 00020000 "ubi"
```
Signed-off-by: Qing W <ses1er@gmail.com>
		
	
		
			
				
	
	
		
			322 lines
		
	
	
		
			5.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			322 lines
		
	
	
		
			5.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7986a.dtsi"
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/ {
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	aliases {
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		serial0 = &uart0;
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	};
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	chosen: chosen {
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		stdout-path = "serial0:115200n8";
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	};
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	memory@40000000 {
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		reg = <0 0x40000000 0 0x20000000>;
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		device_type = "memory";
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	};
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	reg_1p8v: regulator-1p8v {
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		compatible = "regulator-fixed";
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		regulator-name = "fixed-1.8V";
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		regulator-min-microvolt = <1800000>;
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		regulator-max-microvolt = <1800000>;
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		regulator-boot-on;
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		regulator-always-on;
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	};
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	reg_3p3v: regulator-3p3v {
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		compatible = "regulator-fixed";
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		regulator-name = "fixed-3.3V";
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		regulator-min-microvolt = <3300000>;
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		regulator-max-microvolt = <3300000>;
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		regulator-boot-on;
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		regulator-always-on;
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	};
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	reg_5v: regulator-5v {
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		compatible = "regulator-fixed";
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		regulator-name = "fixed-5V";
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		regulator-min-microvolt = <5000000>;
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		regulator-max-microvolt = <5000000>;
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		regulator-boot-on;
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		regulator-always-on;
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	};
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	gpio-keys {
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		compatible = "gpio-keys";
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		factory {
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			label = "reset";
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			linux,code = <KEY_RESTART>;
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			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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		};
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		wps {
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			label = "wps";
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			linux,code = <KEY_WPS_BUTTON>;
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			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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		};
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	};
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};
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&crypto {
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	status = "okay";
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};
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ð {
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	status = "okay";
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	gmac0: mac@0 {
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		compatible = "mediatek,eth-mac";
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		reg = <0>;
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		phy-mode = "2500base-x";
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		fixed-link {
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			speed = <2500>;
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			full-duplex;
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			pause;
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		};
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	};
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	gmac1: mac@1 {
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		compatible = "mediatek,eth-mac";
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		reg = <1>;
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		phy-mode = "2500base-x";
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		phy-handle = <&phy6>;
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	};
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	mdio-bus {
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		#address-cells = <1>;
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		#size-cells = <0>;
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		switch@1f {
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			compatible = "mediatek,mt7531";
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			reg = <31>;
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			reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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			ports {
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				#address-cells = <1>;
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				#size-cells = <0>;
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				port@1 {
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					reg = <1>;
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					label = "lan1";
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				};
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				port@2 {
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					reg = <2>;
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					label = "lan2";
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				};
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				port@3 {
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					reg = <3>;
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					label = "lan3";
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				};
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				port@4 {
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					reg = <4>;
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					label = "lan4";
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				};
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				port@6 {
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					reg = <6>;
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					label = "cpu";
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					ethernet = <&gmac0>;
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					phy-mode = "2500base-x";
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					fixed-link {
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						speed = <2500>;
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						full-duplex;
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						pause;
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					};
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				};
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			};
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		};
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		phy6: phy@6 {
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			compatible = "ethernet-phy-ieee802.3-c45";
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			reg = <6>;
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		};
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	};
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};
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&pio {
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	spi_flash_pins: spi-flash-pins-33-to-38 {
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		mux {
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			function = "spi";
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			groups = "spi0", "spi0_wp_hold";
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		};
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		conf-pu {
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			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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			drive-strength = <MTK_DRIVE_8mA>;
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			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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		};
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		conf-pd {
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			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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			drive-strength = <MTK_DRIVE_8mA>;
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			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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		};
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	};
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	spi_led_pins: spic-pins-29-to-32 {
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		mux {
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			function = "spi";
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			groups = "spi1_2";
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		};
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	};
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	wf_2g_5g_pins: wf_2g_5g-pins {
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		mux {
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			function = "wifi";
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			groups = "wf_2g", "wf_5g";
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		};
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		conf {
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			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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				   "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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				   "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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				   "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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				   "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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				   "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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				   "WF1_TOP_CLK", "WF1_TOP_DATA";
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			drive-strength = <MTK_DRIVE_4mA>;
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		};
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	};
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	wf_dbdc_pins: wf-dbdc-pins {
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		mux {
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			function = "wifi";
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			groups = "wf_dbdc";
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		};
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		conf {
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			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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				"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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				"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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				"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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				"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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				"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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				"WF1_TOP_CLK", "WF1_TOP_DATA";
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			drive-strength = <MTK_DRIVE_4mA>;
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		};
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	};
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};
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&spi0 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&spi_flash_pins>;
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	status = "okay";
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	spi_nand@0 {
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		compatible = "spi-nand";
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		#address-cells = <1>;
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		#size-cells = <1>;
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		reg = <0>;
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		spi-max-frequency = <52000000>;
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		spi-tx-bus-width = <4>;
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		spi-rx-bus-width = <4>;
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		partitions: partitions {
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			compatible = "fixed-partitions";
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			#address-cells = <1>;
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			#size-cells = <1>;
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			partition@0 {
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				label = "bl2";
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				reg = <0x0 0x100000>;
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				read-only;
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			};
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			partition@100000 {
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				label = "u-boot-env";
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				reg = <0x100000 0x80000>;
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			};
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			partition@180000 {
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				label = "factory";
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				reg = <0x180000 0x200000>;
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				read-only;
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				nvmem-layout {
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					compatible = "fixed-layout";
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					#address-cells = <1>;
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					#size-cells = <1>;
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					eeprom_factory_0: eeprom@0 {
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						reg = <0x0 0x1000>;
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					};
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				};
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			};
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			partition@380000 {
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				label = "fip";
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				reg = <0x380000 0x200000>;
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				read-only;
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			};
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			partition@580000 {
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				label = "prod";
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				reg = <0x580000 0x20000>;
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				read-only;
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			};
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		};
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	};
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};
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&spi1 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&spi_led_pins>;
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	status = "okay";
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	ws2812b@0 {
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		#address-cells = <1>;
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		#size-cells = <0>;
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		compatible = "worldsemi,ws2812b";
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		reg = <0>;
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		spi-max-frequency = <3000000>;
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		led_status_rgb: led@0 {
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			reg = <0>;
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			function = LED_FUNCTION_STATUS;
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			color = <LED_COLOR_ID_RGB>;
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			color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
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		};
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	};
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};
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&ssusb {
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	vusb33-supply = <®_3p3v>;
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	vbus-supply = <®_5v>;
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	status = "okay";
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};
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&trng {
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	status = "okay";
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};
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&uart0 {
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	status = "okay";
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};
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&usb_phy {
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	status = "okay";
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};
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&watchdog {
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	status = "okay";
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};
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&wifi {
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	nvmem-cells = <&eeprom_factory_0>;
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	nvmem-cell-names = "eeprom";
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	pinctrl-names = "default", "dbdc";
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	pinctrl-0 = <&wf_2g_5g_pins>;
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	pinctrl-1 = <&wf_dbdc_pins>;
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	status = "okay";
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};
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