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openwrt/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts
Daniel Golle 8b66f1a06d mediatek: correct address of MT753x switch IC
For all boards currently working with the mt7530 DSA driver we can
be sure that the address of the switch on the MDIO bus is 31 --
simply because that address is hard-coded in the driver and the
address from the Device Tree is being ignore.

An upcoming patch will add support for MT753x ICs which are programmed
to addresses different from 0x1f using bootstrap pins. As a result the
address from the Device Tree will then be taken into account, which
will break currently working boards which got the address set to
anything else than 31.

While at it also unify the syntax in Device Tree to always us a decimal
value for the 'reg' property.

 * mt7622-buffalo-wsr-3200ax4s.dts
   Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'

 * mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi
   Wrong address: 0 -> 31

 * mt7622-elecom-wrc-x3200gst3.dts
   Wrong address: 0 -> 31

 * mt7622-linksys-e8450.dtsi
   Wrong address: 0 -> 31

 * mt7622-ruijie-rg-ew3200.dtsi
   Wrong address: 0 -> 31

 * mt7622-xiaomi-redmi-router-ax6s.dts
   Wrong address: 0 -> 31

 * mt7629-iptime-a6004mx.dts
   Wrong address: 2 -> 31

 * mt7981b-zbtlink-zbt-z8102ax.dts
   Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2024-04-24 21:05:46 +01:00

327 lines
5.3 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "Zbtlink ZBT-Z8102AX";
compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
aliases {
serial0 = &uart0;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-mesh {
label = "mesh";
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
button-hub {
label = "hub";
linux,code = <BTN_1>;
gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led_status_red: red {
gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led_status_green: green {
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
blue {
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
4g {
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_USB;
function-enumerator = <0>;
};
4g2 {
gpios = <&pio 14 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_USB;
function-enumerator = <1>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <1000>;
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
pcie {
gpio-export,name = "pcie_power";
gpio-export,output = <1>;
gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
};
5g1 {
gpio-export,name = "5g1";
gpio-export,output = <1>;
gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
};
5g2 {
gpio-export,name = "5g2";
gpio-export,output = <1>;
gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
};
sim1 {
gpio-export,name = "sim1";
gpio-export,output = <1>;
gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
};
sim2 {
gpio-export,name = "sim2";
gpio-export,output = <1>;
gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 2>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 3>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&usb_phy {
status = "okay";
};
&xhci {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory>;
nvmem-cell-names = "eeprom";
};