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8b66f1a06d
For all boards currently working with the mt7530 DSA driver we can be sure that the address of the switch on the MDIO bus is 31 -- simply because that address is hard-coded in the driver and the address from the Device Tree is being ignore. An upcoming patch will add support for MT753x ICs which are programmed to addresses different from 0x1f using bootstrap pins. As a result the address from the Device Tree will then be taken into account, which will break currently working boards which got the address set to anything else than 31. While at it also unify the syntax in Device Tree to always us a decimal value for the 'reg' property. * mt7622-buffalo-wsr-3200ax4s.dts Cosmetic change 'reg = <0x1f>' -> 'reg = <31>' * mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi Wrong address: 0 -> 31 * mt7622-elecom-wrc-x3200gst3.dts Wrong address: 0 -> 31 * mt7622-linksys-e8450.dtsi Wrong address: 0 -> 31 * mt7622-ruijie-rg-ew3200.dtsi Wrong address: 0 -> 31 * mt7622-xiaomi-redmi-router-ax6s.dts Wrong address: 0 -> 31 * mt7629-iptime-a6004mx.dts Wrong address: 2 -> 31 * mt7981b-zbtlink-zbt-z8102ax.dts Cosmetic change 'reg = <0x1f>' -> 'reg = <31>' Signed-off-by: Daniel Golle <daniel@makrotopia.org>
327 lines
5.3 KiB
Plaintext
327 lines
5.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981.dtsi"
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/ {
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model = "Zbtlink ZBT-Z8102AX";
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compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_green;
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label-mac-device = &gmac0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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button-mesh {
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label = "mesh";
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linux,code = <BTN_0>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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button-hub {
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label = "hub";
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linux,code = <BTN_1>;
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gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_red: red {
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gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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};
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led_status_green: green {
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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};
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blue {
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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};
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4g {
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_USB;
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function-enumerator = <0>;
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};
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4g2 {
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gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_USB;
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function-enumerator = <1>;
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};
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};
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watchdog {
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compatible = "linux,wdt-gpio";
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gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
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hw_algo = "toggle";
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hw_margin_ms = <1000>;
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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pcie {
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gpio-export,name = "pcie_power";
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gpio-export,output = <1>;
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gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
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};
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5g1 {
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gpio-export,name = "5g1";
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gpio-export,output = <1>;
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gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
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};
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5g2 {
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gpio-export,name = "5g2";
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gpio-export,output = <1>;
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gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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};
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sim1 {
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gpio-export,name = "sim1";
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gpio-export,output = <1>;
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gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
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};
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sim2 {
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gpio-export,name = "sim2";
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gpio-export,output = <1>;
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gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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/* LAN */
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 2>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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/* WAN */
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_4 3>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x0000000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_4: macaddr@4 {
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compatible = "mac-base";
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reg = <0x4 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <8>;
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bias-pull-up = <103>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <8>;
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bias-pull-down = <103>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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&wifi {
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status = "okay";
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nvmem-cells = <&eeprom_factory>;
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nvmem-cell-names = "eeprom";
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};
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