0
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-11-22 04:56:15 +00:00
openwrt/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
Pawel Dembicki 19d770d7b9 mediatek: filogic: add support for Cudy AP3000 Outdoor
Hardware highlights:
  - MediaTek MT7981 WiSoC
  - 256MB DDR3 RAM
  - 64MB SPI-NAND
  - MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
  - 1x LED in two colors
  - 2x Button
  - 1x 1GbE
  - Two detachable antenas, two internal pcb antenas
  - PoE powered (standalone)

MAC:
LAN MAC: label mac
2.4G MAC: label mac -1
5G MAC: label mac

How to install:
1. Apply Cudy Intermediate OpenWrt image for AP3000 Outdoor V1
2. Install OpenWrt sysupgrade image

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16156
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-08-25 15:35:53 +02:00

210 lines
3.7 KiB
Plaintext

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "Cudy AP3000 Outdoor v1";
compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
aliases {
label-mac-device = &gmac1;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_red;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status_green: led@0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
};
led_status_red: led_1 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
antctrl {
/* Not sure if this pin does anything.
* It was taken from GPL sources.
* Intermediate image doesn't have it.
*/
gpio-export,name = "antctrl";
gpio-export,output = <1>;
gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
};
};
watchdog-hw {
compatible = "linux,wdt-gpio";
gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
hw_algo = "level";
hw_margin_ms = <10000>;
always-running;
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 1>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
read-only;
};
factory: partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "bdinfo";
reg = <0x380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
compatible = "mac-base";
reg = <0xde00 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@3C0000 {
label = "FIP";
reg = <0x3C0000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x5C0000 0x4000000>;
compatible = "linux,ubi";
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};