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8b66f1a06d
For all boards currently working with the mt7530 DSA driver we can be sure that the address of the switch on the MDIO bus is 31 -- simply because that address is hard-coded in the driver and the address from the Device Tree is being ignore. An upcoming patch will add support for MT753x ICs which are programmed to addresses different from 0x1f using bootstrap pins. As a result the address from the Device Tree will then be taken into account, which will break currently working boards which got the address set to anything else than 31. While at it also unify the syntax in Device Tree to always us a decimal value for the 'reg' property. * mt7622-buffalo-wsr-3200ax4s.dts Cosmetic change 'reg = <0x1f>' -> 'reg = <31>' * mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi Wrong address: 0 -> 31 * mt7622-elecom-wrc-x3200gst3.dts Wrong address: 0 -> 31 * mt7622-linksys-e8450.dtsi Wrong address: 0 -> 31 * mt7622-ruijie-rg-ew3200.dtsi Wrong address: 0 -> 31 * mt7622-xiaomi-redmi-router-ax6s.dts Wrong address: 0 -> 31 * mt7629-iptime-a6004mx.dts Wrong address: 2 -> 31 * mt7981b-zbtlink-zbt-z8102ax.dts Cosmetic change 'reg = <0x1f>' -> 'reg = <31>' Signed-off-by: Daniel Golle <daniel@makrotopia.org>
176 lines
2.8 KiB
Plaintext
176 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7622-buffalo-wsr.dtsi"
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/ {
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model = "Buffalo WSR-3200AX4S";
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compatible = "buffalo,wsr-3200ax4s", "mediatek,mt7622";
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memory {
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reg = <0 0x40000000 0 0x1f000000>;
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};
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};
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&pio {
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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conf-cmd-dat {
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pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
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"SPI_MISO", "SPI_CS";
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input-enable;
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drive-strength = <16>;
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bias-pull-up;
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};
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conf-clk {
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pins = "SPI_CLK";
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drive-strength = <16>;
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bias-pull-down;
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};
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};
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};
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&mdio {
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-connection-type = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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&snfi {
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pinctrl-names = "default";
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pinctrl-0 = <&serial_nand_pins>;
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <104000000>;
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nand-ecc-engine = <&snfi>;
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mediatek,bmt-v2;
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mediatek,bmt-table-size = <0x1000>;
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/*
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* - Preloader - (kernel (6MiB, in firmware))
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* - Kernel2 - WTB
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*/
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mediatek,bmt-remap-range = <0x0 0x8c0000>,
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<0x1ac0000 0x5200000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "ATF";
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reg = <0x80000 0x40000>;
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read-only;
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};
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partition@c0000 {
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label = "u-boot";
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reg = <0xc0000 0x80000>;
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read-only;
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};
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partition@140000 {
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label = "u-boot-env";
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reg = <0x140000 0x80000>;
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read-only;
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};
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factory: partition@1c0000 {
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label = "factory";
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reg = <0x1c0000 0x100000>;
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read-only;
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};
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partition@2c0000 {
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compatible = "brcm,trx";
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brcm,trx-magic = <0x33504844>;
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label = "firmware";
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reg = <0x2c0000 0x1800000>;
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};
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partition@1ac0000 {
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label = "Kernel2";
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reg = <0x1ac0000 0x1800000>;
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};
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partition@32c0000 {
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label = "glbcfg";
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reg = <0x32c0000 0x200000>;
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read-only;
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};
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partition@34c0000 {
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label = "board_data";
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reg = <0x34c0000 0x200000>;
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read-only;
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};
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partition@36c0000 {
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label = "WTB";
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reg = <0x36c0000 0x3600000>;
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read-only;
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};
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};
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};
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};
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