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5f307b29cd
Add a set of upstream patches for the imx8m{m,n,p} based Venice
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/15736
Signed-off-by: Robert Marko <robimarko@gmail.com>
40 lines
1.1 KiB
Diff
40 lines
1.1 KiB
Diff
From 9095a68c0b7084a7819e697ef38d0c987531c8ab Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Wed, 29 Nov 2023 17:11:51 -0800
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Subject: [PATCH 406/413] 6.9: arm64: dts: imx8mp-venice-gw71xx: add TPM device
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Add the TPM device found on the GW71xx revision E PCB.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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.../arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi | 10 +++++++++-
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1 file changed, 9 insertions(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
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+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
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@@ -48,8 +48,15 @@
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2>;
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- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
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+ <&gpio1 10 GPIO_ACTIVE_LOW>;
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status = "okay";
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+
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+ tpm@1 {
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+ compatible = "tcg,tpm_tis-spi";
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+ reg = <0x1>;
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+ spi-max-frequency = <36000000>;
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+ };
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};
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&gpio4 {
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@@ -217,6 +224,7 @@
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MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
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MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
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MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
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+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
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>;
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};
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