0
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-11-22 04:56:15 +00:00
openwrt/target/linux/imx/patches-6.6/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch
Tim Harvey c78c71737b imx: 6.6: refresh kernel patches
refresh 6.6 kernel patches via 'make target/linux/refresh'

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-06-06 22:04:23 +02:00

79 lines
1.8 KiB
Diff

From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
Date: Tue, 3 Mar 2020 15:15:57 +0100
Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Petr Štetiar <ynezz@true.cz>
---
arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++-
arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts | 15 ++++++++++++++-
2 files changed, 28 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts
@@ -59,6 +59,17 @@
label = "LED_5_RED";
};
};
+
+ gpio-keys {
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <10>;
+ };
+ };
};
&can1 {
@@ -183,4 +194,10 @@
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
+
+ pinctrl_switch3_ixora: switch3ixora {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
+ >;
+ };
};
--- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts
@@ -61,6 +61,17 @@
};
};
+ gpio-keys {
+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <10>;
+ };
+ };
+
reg_3v3_vmmc: regulator-3v3-vmmc {
compatible = "regulator-fixed";
enable-active-high;
@@ -264,6 +275,12 @@
>;
};
+ pinctrl_switch3_ixora: switch3ixora {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
+ >;
+ };
+
pinctrl_mmc_cd_sleep: mmccdslpgrp {
fsl,pins = <
/* MMC1 CD */