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https://git.openwrt.org/openwrt/openwrt.git
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8a9273d51e
Copy backport, hack, pending patch and config from 6.1 to 6.6. Signed-off-by: Weijie Gao <hackpascal@gmail.com>
639 lines
18 KiB
Diff
639 lines
18 KiB
Diff
From 2e45d404d99d43bb7127b74b5dea8818df64996c Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Mon, 29 Jan 2024 15:15:21 +0100
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Subject: [PATCH 3/5] net: phy: qcom: deatch qca83xx PHY driver from at803x
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Deatch qca83xx PHY driver from at803x.
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The QCA83xx PHYs implement specific function and doesn't use generic
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at803x so it can be detached from the driver and moved to a dedicated
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one.
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Probe function and priv struct is reimplemented to allocate and use
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only the qca83xx specific data. Unused data from at803x PHY driver
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are dropped from at803x priv struct.
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This is to make slimmer PHY drivers instead of including lots of bloat
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that would never be used in specific SoC.
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A new Kconfig flag QCA83XX_PHY is introduced to compile the new
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introduced PHY driver.
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As the Kconfig name starts with Qualcomm the same order is kept.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Link: https://lore.kernel.org/r/20240129141600.2592-4-ansuelsmth@gmail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/qcom/Kconfig | 11 +-
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drivers/net/phy/qcom/Makefile | 1 +
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drivers/net/phy/qcom/at803x.c | 235 ----------------------------
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drivers/net/phy/qcom/qca83xx.c | 275 +++++++++++++++++++++++++++++++++
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4 files changed, 284 insertions(+), 238 deletions(-)
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create mode 100644 drivers/net/phy/qcom/qca83xx.c
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--- a/drivers/net/phy/qcom/Kconfig
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+++ b/drivers/net/phy/qcom/Kconfig
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@@ -3,9 +3,14 @@ config QCOM_NET_PHYLIB
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tristate
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config AT803X_PHY
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- tristate "Qualcomm Atheros AR803X PHYs and QCA833x PHYs"
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+ tristate "Qualcomm Atheros AR803X PHYs"
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select QCOM_NET_PHYLIB
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depends on REGULATOR
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help
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- Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
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- QCA8337(Internal qca8k PHY) model
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+ Currently supports the AR8030, AR8031, AR8033, AR8035 model
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+
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+config QCA83XX_PHY
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+ tristate "Qualcomm Atheros QCA833x PHYs"
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+ select QCOM_NET_PHYLIB
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+ help
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+ Currently supports the internal QCA8337(Internal qca8k PHY) model
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--- a/drivers/net/phy/qcom/Makefile
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+++ b/drivers/net/phy/qcom/Makefile
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@@ -1,3 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_QCOM_NET_PHYLIB) += qcom-phy-lib.o
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obj-$(CONFIG_AT803X_PHY) += at803x.o
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+obj-$(CONFIG_QCA83XX_PHY) += qca83xx.o
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--- a/drivers/net/phy/qcom/at803x.c
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+++ b/drivers/net/phy/qcom/at803x.c
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@@ -102,17 +102,10 @@
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#define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
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#define AT803X_PSSR_MR_AN_COMPLETE 0x0200
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-#define AT803X_DEBUG_REG_3C 0x3C
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-
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-#define AT803X_DEBUG_REG_GREEN 0x3D
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-#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6)
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-
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#define AT803X_DEBUG_REG_1F 0x1F
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#define AT803X_DEBUG_PLL_ON BIT(2)
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#define AT803X_DEBUG_RGMII_1V8 BIT(3)
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-#define MDIO_AZ_DEBUG 0x800D
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-
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/* AT803x supports either the XTAL input pad, an internal PLL or the
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* DSP as clock reference for the clock output pad. The XTAL reference
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* is only used for 25 MHz output, all other frequencies need the PLL.
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@@ -163,13 +156,7 @@
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#define QCA8081_PHY_ID 0x004dd101
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-#define QCA8327_A_PHY_ID 0x004dd033
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-#define QCA8327_B_PHY_ID 0x004dd034
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-#define QCA8337_PHY_ID 0x004dd036
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#define QCA9561_PHY_ID 0x004dd042
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-#define QCA8K_PHY_ID_MASK 0xffffffff
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-
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-#define QCA8K_DEVFLAGS_REVISION_MASK GENMASK(2, 0)
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#define AT803X_PAGE_FIBER 0
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#define AT803X_PAGE_COPPER 1
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@@ -379,12 +366,6 @@ MODULE_DESCRIPTION("Qualcomm Atheros AR8
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MODULE_AUTHOR("Matus Ujhelyi");
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MODULE_LICENSE("GPL");
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-static struct at803x_hw_stat qca83xx_hw_stats[] = {
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- { "phy_idle_errors", 0xa, GENMASK(7, 0), PHY},
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- { "phy_receive_errors", 0x15, GENMASK(15, 0), PHY},
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- { "eee_wake_errors", 0x16, GENMASK(15, 0), MMD},
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-};
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-
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struct at803x_ss_mask {
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u16 speed_mask;
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u8 speed_shift;
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@@ -400,7 +381,6 @@ struct at803x_priv {
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bool is_1000basex;
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struct regulator_dev *vddio_rdev;
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struct regulator_dev *vddh_rdev;
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- u64 stats[ARRAY_SIZE(qca83xx_hw_stats)];
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int led_polarity_mode;
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};
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@@ -564,53 +544,6 @@ static void at803x_get_wol(struct phy_de
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wol->wolopts |= WAKE_MAGIC;
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}
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-static int qca83xx_get_sset_count(struct phy_device *phydev)
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-{
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- return ARRAY_SIZE(qca83xx_hw_stats);
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-}
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-
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-static void qca83xx_get_strings(struct phy_device *phydev, u8 *data)
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-{
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- int i;
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-
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- for (i = 0; i < ARRAY_SIZE(qca83xx_hw_stats); i++) {
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- strscpy(data + i * ETH_GSTRING_LEN,
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- qca83xx_hw_stats[i].string, ETH_GSTRING_LEN);
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- }
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-}
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-
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-static u64 qca83xx_get_stat(struct phy_device *phydev, int i)
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-{
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- struct at803x_hw_stat stat = qca83xx_hw_stats[i];
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- struct at803x_priv *priv = phydev->priv;
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- int val;
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- u64 ret;
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-
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- if (stat.access_type == MMD)
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- val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg);
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- else
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- val = phy_read(phydev, stat.reg);
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-
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- if (val < 0) {
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- ret = U64_MAX;
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- } else {
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- val = val & stat.mask;
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- priv->stats[i] += val;
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- ret = priv->stats[i];
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- }
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-
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- return ret;
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-}
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-
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-static void qca83xx_get_stats(struct phy_device *phydev,
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- struct ethtool_stats *stats, u64 *data)
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-{
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- int i;
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-
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- for (i = 0; i < ARRAY_SIZE(qca83xx_hw_stats); i++)
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- data[i] = qca83xx_get_stat(phydev, i);
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-}
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-
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static int at803x_suspend(struct phy_device *phydev)
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{
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int value;
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@@ -1707,124 +1640,6 @@ static int at8035_probe(struct phy_devic
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return at8035_parse_dt(phydev);
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}
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-static int qca83xx_config_init(struct phy_device *phydev)
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-{
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- u8 switch_revision;
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-
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- switch_revision = phydev->dev_flags & QCA8K_DEVFLAGS_REVISION_MASK;
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-
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- switch (switch_revision) {
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- case 1:
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- /* For 100M waveform */
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- at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea);
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- /* Turn on Gigabit clock */
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- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0);
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- break;
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-
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- case 2:
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- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0);
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- fallthrough;
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- case 4:
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- phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f);
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- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860);
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- at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46);
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- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000);
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- break;
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- }
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-
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- /* Following original QCA sourcecode set port to prefer master */
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- phy_set_bits(phydev, MII_CTRL1000, CTL1000_PREFER_MASTER);
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-
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- return 0;
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-}
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-
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-static int qca8327_config_init(struct phy_device *phydev)
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-{
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- /* QCA8327 require DAC amplitude adjustment for 100m set to +6%.
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- * Disable on init and enable only with 100m speed following
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- * qca original source code.
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- */
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- at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
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- QCA8327_DEBUG_MANU_CTRL_EN, 0);
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-
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- return qca83xx_config_init(phydev);
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-}
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-
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-static void qca83xx_link_change_notify(struct phy_device *phydev)
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-{
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- /* Set DAC Amplitude adjustment to +6% for 100m on link running */
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- if (phydev->state == PHY_RUNNING) {
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- if (phydev->speed == SPEED_100)
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- at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
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- QCA8327_DEBUG_MANU_CTRL_EN,
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- QCA8327_DEBUG_MANU_CTRL_EN);
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- } else {
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- /* Reset DAC Amplitude adjustment */
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- at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
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- QCA8327_DEBUG_MANU_CTRL_EN, 0);
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- }
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-}
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-
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-static int qca83xx_resume(struct phy_device *phydev)
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-{
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- int ret, val;
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-
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- /* Skip reset if not suspended */
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- if (!phydev->suspended)
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- return 0;
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-
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- /* Reinit the port, reset values set by suspend */
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- qca83xx_config_init(phydev);
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-
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- /* Reset the port on port resume */
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- phy_set_bits(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
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-
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- /* On resume from suspend the switch execute a reset and
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- * restart auto-negotiation. Wait for reset to complete.
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- */
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- ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
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- 50000, 600000, true);
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- if (ret)
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- return ret;
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-
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- usleep_range(1000, 2000);
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-
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- return 0;
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-}
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-
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-static int qca83xx_suspend(struct phy_device *phydev)
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-{
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- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_GREEN,
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- AT803X_DEBUG_GATE_CLK_IN1000, 0);
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-
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- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
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- AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE |
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- AT803X_DEBUG_HIB_CTRL_SEL_RST_80U, 0);
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-
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- return 0;
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-}
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-
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-static int qca8337_suspend(struct phy_device *phydev)
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-{
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- /* Only QCA8337 support actual suspend. */
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- genphy_suspend(phydev);
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-
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- return qca83xx_suspend(phydev);
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-}
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-
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-static int qca8327_suspend(struct phy_device *phydev)
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-{
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- u16 mask = 0;
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-
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- /* QCA8327 cause port unreliability when phy suspend
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- * is set.
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- */
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- mask |= ~(BMCR_SPEED1000 | BMCR_FULLDPLX);
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- phy_modify(phydev, MII_BMCR, mask, 0);
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-
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- return qca83xx_suspend(phydev);
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-}
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-
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static int qca808x_phy_fast_retrain_config(struct phy_device *phydev)
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{
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int ret;
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@@ -2599,53 +2414,6 @@ static struct phy_driver at803x_driver[]
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.soft_reset = genphy_soft_reset,
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.config_aneg = at803x_config_aneg,
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}, {
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- /* QCA8337 */
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- .phy_id = QCA8337_PHY_ID,
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- .phy_id_mask = QCA8K_PHY_ID_MASK,
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- .name = "Qualcomm Atheros 8337 internal PHY",
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- /* PHY_GBIT_FEATURES */
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- .probe = at803x_probe,
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- .flags = PHY_IS_INTERNAL,
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- .config_init = qca83xx_config_init,
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- .soft_reset = genphy_soft_reset,
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- .get_sset_count = qca83xx_get_sset_count,
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- .get_strings = qca83xx_get_strings,
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- .get_stats = qca83xx_get_stats,
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- .suspend = qca8337_suspend,
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- .resume = qca83xx_resume,
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-}, {
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- /* QCA8327-A from switch QCA8327-AL1A */
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- .phy_id = QCA8327_A_PHY_ID,
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- .phy_id_mask = QCA8K_PHY_ID_MASK,
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- .name = "Qualcomm Atheros 8327-A internal PHY",
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- /* PHY_GBIT_FEATURES */
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- .link_change_notify = qca83xx_link_change_notify,
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- .probe = at803x_probe,
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- .flags = PHY_IS_INTERNAL,
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- .config_init = qca8327_config_init,
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- .soft_reset = genphy_soft_reset,
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- .get_sset_count = qca83xx_get_sset_count,
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- .get_strings = qca83xx_get_strings,
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- .get_stats = qca83xx_get_stats,
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- .suspend = qca8327_suspend,
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- .resume = qca83xx_resume,
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-}, {
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- /* QCA8327-B from switch QCA8327-BL1A */
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- .phy_id = QCA8327_B_PHY_ID,
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- .phy_id_mask = QCA8K_PHY_ID_MASK,
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- .name = "Qualcomm Atheros 8327-B internal PHY",
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- /* PHY_GBIT_FEATURES */
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- .link_change_notify = qca83xx_link_change_notify,
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- .probe = at803x_probe,
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- .flags = PHY_IS_INTERNAL,
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- .config_init = qca8327_config_init,
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- .soft_reset = genphy_soft_reset,
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- .get_sset_count = qca83xx_get_sset_count,
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- .get_strings = qca83xx_get_strings,
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- .get_stats = qca83xx_get_stats,
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- .suspend = qca8327_suspend,
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- .resume = qca83xx_resume,
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-}, {
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/* Qualcomm QCA8081 */
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PHY_ID_MATCH_EXACT(QCA8081_PHY_ID),
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.name = "Qualcomm QCA8081",
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@@ -2683,9 +2451,6 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_MATCH_EXACT(ATH8032_PHY_ID) },
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{ PHY_ID_MATCH_EXACT(ATH8035_PHY_ID) },
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{ PHY_ID_MATCH_EXACT(ATH9331_PHY_ID) },
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- { PHY_ID_MATCH_EXACT(QCA8337_PHY_ID) },
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- { PHY_ID_MATCH_EXACT(QCA8327_A_PHY_ID) },
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- { PHY_ID_MATCH_EXACT(QCA8327_B_PHY_ID) },
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{ PHY_ID_MATCH_EXACT(QCA9561_PHY_ID) },
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{ PHY_ID_MATCH_EXACT(QCA8081_PHY_ID) },
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{ }
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--- /dev/null
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+++ b/drivers/net/phy/qcom/qca83xx.c
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@@ -0,0 +1,275 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+
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+#include <linux/phy.h>
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+#include <linux/module.h>
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+
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+#include "qcom.h"
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+
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+#define AT803X_DEBUG_REG_3C 0x3C
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+
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+#define AT803X_DEBUG_REG_GREEN 0x3D
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+#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6)
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+
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+#define MDIO_AZ_DEBUG 0x800D
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+
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+#define QCA8327_A_PHY_ID 0x004dd033
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+#define QCA8327_B_PHY_ID 0x004dd034
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+#define QCA8337_PHY_ID 0x004dd036
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+#define QCA8K_PHY_ID_MASK 0xffffffff
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+
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+#define QCA8K_DEVFLAGS_REVISION_MASK GENMASK(2, 0)
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+
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+static struct at803x_hw_stat qca83xx_hw_stats[] = {
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+ { "phy_idle_errors", 0xa, GENMASK(7, 0), PHY},
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+ { "phy_receive_errors", 0x15, GENMASK(15, 0), PHY},
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+ { "eee_wake_errors", 0x16, GENMASK(15, 0), MMD},
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+};
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+
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+struct qca83xx_priv {
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+ u64 stats[ARRAY_SIZE(qca83xx_hw_stats)];
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+};
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+
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+MODULE_DESCRIPTION("Qualcomm Atheros QCA83XX PHY driver");
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+MODULE_AUTHOR("Matus Ujhelyi");
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+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
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+MODULE_LICENSE("GPL");
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+
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+static int qca83xx_get_sset_count(struct phy_device *phydev)
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+{
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+ return ARRAY_SIZE(qca83xx_hw_stats);
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+}
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+
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+static void qca83xx_get_strings(struct phy_device *phydev, u8 *data)
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+{
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(qca83xx_hw_stats); i++) {
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+ strscpy(data + i * ETH_GSTRING_LEN,
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+ qca83xx_hw_stats[i].string, ETH_GSTRING_LEN);
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+ }
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+}
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+
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+static u64 qca83xx_get_stat(struct phy_device *phydev, int i)
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+{
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+ struct at803x_hw_stat stat = qca83xx_hw_stats[i];
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+ struct qca83xx_priv *priv = phydev->priv;
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+ int val;
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|
+ u64 ret;
|
|
+
|
|
+ if (stat.access_type == MMD)
|
|
+ val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg);
|
|
+ else
|
|
+ val = phy_read(phydev, stat.reg);
|
|
+
|
|
+ if (val < 0) {
|
|
+ ret = U64_MAX;
|
|
+ } else {
|
|
+ val = val & stat.mask;
|
|
+ priv->stats[i] += val;
|
|
+ ret = priv->stats[i];
|
|
+ }
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static void qca83xx_get_stats(struct phy_device *phydev,
|
|
+ struct ethtool_stats *stats, u64 *data)
|
|
+{
|
|
+ int i;
|
|
+
|
|
+ for (i = 0; i < ARRAY_SIZE(qca83xx_hw_stats); i++)
|
|
+ data[i] = qca83xx_get_stat(phydev, i);
|
|
+}
|
|
+
|
|
+static int qca83xx_probe(struct phy_device *phydev)
|
|
+{
|
|
+ struct device *dev = &phydev->mdio.dev;
|
|
+ struct qca83xx_priv *priv;
|
|
+
|
|
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
|
+ if (!priv)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ phydev->priv = priv;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int qca83xx_config_init(struct phy_device *phydev)
|
|
+{
|
|
+ u8 switch_revision;
|
|
+
|
|
+ switch_revision = phydev->dev_flags & QCA8K_DEVFLAGS_REVISION_MASK;
|
|
+
|
|
+ switch (switch_revision) {
|
|
+ case 1:
|
|
+ /* For 100M waveform */
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea);
|
|
+ /* Turn on Gigabit clock */
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0);
|
|
+ break;
|
|
+
|
|
+ case 2:
|
|
+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0);
|
|
+ fallthrough;
|
|
+ case 4:
|
|
+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000);
|
|
+ break;
|
|
+ }
|
|
+
|
|
+ /* Following original QCA sourcecode set port to prefer master */
|
|
+ phy_set_bits(phydev, MII_CTRL1000, CTL1000_PREFER_MASTER);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int qca8327_config_init(struct phy_device *phydev)
|
|
+{
|
|
+ /* QCA8327 require DAC amplitude adjustment for 100m set to +6%.
|
|
+ * Disable on init and enable only with 100m speed following
|
|
+ * qca original source code.
|
|
+ */
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
+ QCA8327_DEBUG_MANU_CTRL_EN, 0);
|
|
+
|
|
+ return qca83xx_config_init(phydev);
|
|
+}
|
|
+
|
|
+static void qca83xx_link_change_notify(struct phy_device *phydev)
|
|
+{
|
|
+ /* Set DAC Amplitude adjustment to +6% for 100m on link running */
|
|
+ if (phydev->state == PHY_RUNNING) {
|
|
+ if (phydev->speed == SPEED_100)
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
+ QCA8327_DEBUG_MANU_CTRL_EN,
|
|
+ QCA8327_DEBUG_MANU_CTRL_EN);
|
|
+ } else {
|
|
+ /* Reset DAC Amplitude adjustment */
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
+ QCA8327_DEBUG_MANU_CTRL_EN, 0);
|
|
+ }
|
|
+}
|
|
+
|
|
+static int qca83xx_resume(struct phy_device *phydev)
|
|
+{
|
|
+ int ret, val;
|
|
+
|
|
+ /* Skip reset if not suspended */
|
|
+ if (!phydev->suspended)
|
|
+ return 0;
|
|
+
|
|
+ /* Reinit the port, reset values set by suspend */
|
|
+ qca83xx_config_init(phydev);
|
|
+
|
|
+ /* Reset the port on port resume */
|
|
+ phy_set_bits(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
|
|
+
|
|
+ /* On resume from suspend the switch execute a reset and
|
|
+ * restart auto-negotiation. Wait for reset to complete.
|
|
+ */
|
|
+ ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
|
|
+ 50000, 600000, true);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ usleep_range(1000, 2000);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int qca83xx_suspend(struct phy_device *phydev)
|
|
+{
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_GREEN,
|
|
+ AT803X_DEBUG_GATE_CLK_IN1000, 0);
|
|
+
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
|
|
+ AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE |
|
|
+ AT803X_DEBUG_HIB_CTRL_SEL_RST_80U, 0);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int qca8337_suspend(struct phy_device *phydev)
|
|
+{
|
|
+ /* Only QCA8337 support actual suspend. */
|
|
+ genphy_suspend(phydev);
|
|
+
|
|
+ return qca83xx_suspend(phydev);
|
|
+}
|
|
+
|
|
+static int qca8327_suspend(struct phy_device *phydev)
|
|
+{
|
|
+ u16 mask = 0;
|
|
+
|
|
+ /* QCA8327 cause port unreliability when phy suspend
|
|
+ * is set.
|
|
+ */
|
|
+ mask |= ~(BMCR_SPEED1000 | BMCR_FULLDPLX);
|
|
+ phy_modify(phydev, MII_BMCR, mask, 0);
|
|
+
|
|
+ return qca83xx_suspend(phydev);
|
|
+}
|
|
+
|
|
+static struct phy_driver qca83xx_driver[] = {
|
|
+{
|
|
+ /* QCA8337 */
|
|
+ .phy_id = QCA8337_PHY_ID,
|
|
+ .phy_id_mask = QCA8K_PHY_ID_MASK,
|
|
+ .name = "Qualcomm Atheros 8337 internal PHY",
|
|
+ /* PHY_GBIT_FEATURES */
|
|
+ .probe = qca83xx_probe,
|
|
+ .flags = PHY_IS_INTERNAL,
|
|
+ .config_init = qca83xx_config_init,
|
|
+ .soft_reset = genphy_soft_reset,
|
|
+ .get_sset_count = qca83xx_get_sset_count,
|
|
+ .get_strings = qca83xx_get_strings,
|
|
+ .get_stats = qca83xx_get_stats,
|
|
+ .suspend = qca8337_suspend,
|
|
+ .resume = qca83xx_resume,
|
|
+}, {
|
|
+ /* QCA8327-A from switch QCA8327-AL1A */
|
|
+ .phy_id = QCA8327_A_PHY_ID,
|
|
+ .phy_id_mask = QCA8K_PHY_ID_MASK,
|
|
+ .name = "Qualcomm Atheros 8327-A internal PHY",
|
|
+ /* PHY_GBIT_FEATURES */
|
|
+ .link_change_notify = qca83xx_link_change_notify,
|
|
+ .probe = qca83xx_probe,
|
|
+ .flags = PHY_IS_INTERNAL,
|
|
+ .config_init = qca8327_config_init,
|
|
+ .soft_reset = genphy_soft_reset,
|
|
+ .get_sset_count = qca83xx_get_sset_count,
|
|
+ .get_strings = qca83xx_get_strings,
|
|
+ .get_stats = qca83xx_get_stats,
|
|
+ .suspend = qca8327_suspend,
|
|
+ .resume = qca83xx_resume,
|
|
+}, {
|
|
+ /* QCA8327-B from switch QCA8327-BL1A */
|
|
+ .phy_id = QCA8327_B_PHY_ID,
|
|
+ .phy_id_mask = QCA8K_PHY_ID_MASK,
|
|
+ .name = "Qualcomm Atheros 8327-B internal PHY",
|
|
+ /* PHY_GBIT_FEATURES */
|
|
+ .link_change_notify = qca83xx_link_change_notify,
|
|
+ .probe = qca83xx_probe,
|
|
+ .flags = PHY_IS_INTERNAL,
|
|
+ .config_init = qca8327_config_init,
|
|
+ .soft_reset = genphy_soft_reset,
|
|
+ .get_sset_count = qca83xx_get_sset_count,
|
|
+ .get_strings = qca83xx_get_strings,
|
|
+ .get_stats = qca83xx_get_stats,
|
|
+ .suspend = qca8327_suspend,
|
|
+ .resume = qca83xx_resume,
|
|
+}, };
|
|
+
|
|
+module_phy_driver(qca83xx_driver);
|
|
+
|
|
+static struct mdio_device_id __maybe_unused qca83xx_tbl[] = {
|
|
+ { PHY_ID_MATCH_EXACT(QCA8337_PHY_ID) },
|
|
+ { PHY_ID_MATCH_EXACT(QCA8327_A_PHY_ID) },
|
|
+ { PHY_ID_MATCH_EXACT(QCA8327_B_PHY_ID) },
|
|
+ { }
|
|
+};
|
|
+
|
|
+MODULE_DEVICE_TABLE(mdio, qca83xx_tbl);
|