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480537ed36
This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Link: https://github.com/openwrt/openwrt/pull/16547 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
29 lines
1.1 KiB
Diff
29 lines
1.1 KiB
Diff
From cf1ba3cb245020459f2ca446b7a7b199839f5d83 Mon Sep 17 00:00:00 2001
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From: Dan Carpenter <dan.carpenter@linaro.org>
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Date: Thu, 6 Mar 2025 12:40:01 +0300
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Subject: [PATCH] spi: spi-qpic-snand: Fix ECC_CFG_ECC_DISABLE shift in
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qcom_spi_read_last_cw()
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The ECC_CFG_ECC_DISABLE define is BIT(0). It's supposed to be used
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directly instead of used as a shifter.
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Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
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Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
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Link: https://patch.msgid.link/2f4b0a0b-2c03-41c0-8a4a-3d789a83832d@stanley.mountain
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-qpic-snand.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/spi/spi-qpic-snand.c
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+++ b/drivers/spi/spi-qpic-snand.c
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@@ -514,7 +514,7 @@ static int qcom_spi_read_last_cw(struct
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cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |
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0 << CW_PER_PAGE;
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cfg1 = ecc_cfg->cfg1_raw;
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- ecc_bch_cfg = 1 << ECC_CFG_ECC_DISABLE;
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+ ecc_bch_cfg = ECC_CFG_ECC_DISABLE;
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snandc->regs->cmd = snandc->qspi->cmd;
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snandc->regs->cfg0 = cpu_to_le32(cfg0);
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