mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-11-24 22:16:14 +00:00
6bbb75dfdc
bmips has all the dt-bindings includes inside each SoC .dtsi files, so let's move the new includes there instead of adding them to each board .dts files. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
511 lines
10 KiB
Plaintext
511 lines
10 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/clock/bcm6328-clock.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
#include <dt-bindings/reset/bcm6328-reset.h>
|
|
#include <dt-bindings/soc/bcm6328-pm.h>
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "brcm,bcm6328";
|
|
|
|
aliases {
|
|
nflash = &nflash;
|
|
pinctrl = &pinctrl;
|
|
serial0 = &uart0;
|
|
serial1 = &uart1;
|
|
spi1 = &hsspi;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "earlycon";
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
clocks {
|
|
periph_osc: periph-osc {
|
|
compatible = "fixed-clock";
|
|
|
|
#clock-cells = <0>;
|
|
|
|
clock-frequency = <50000000>;
|
|
clock-output-names = "periph";
|
|
};
|
|
|
|
hsspi_osc: hsspi-osc {
|
|
compatible = "fixed-clock";
|
|
|
|
#clock-cells = <0>;
|
|
|
|
clock-frequency = <133333333>;
|
|
clock-output-names = "hsspi_osc";
|
|
};
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
mips-hpt-frequency = <160000000>;
|
|
|
|
cpu@0 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
cpu_intc: interrupt-controller {
|
|
#address-cells = <0>;
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0 0>;
|
|
};
|
|
|
|
ubus {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
compatible = "simple-bus";
|
|
ranges;
|
|
|
|
periph_clk: clock-controller@10000004 {
|
|
compatible = "brcm,bcm6328-clocks";
|
|
reg = <0x10000004 0x4>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
periph_rst: reset-controller@10000010 {
|
|
compatible = "brcm,bcm6345-reset";
|
|
reg = <0x10000010 0x4>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
ext_intc: interrupt-controller@10000018 {
|
|
#address-cells = <1>;
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
reg = <0x10000018 0x4>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_EXTO>,
|
|
<BCM6328_IRQ_EXT1>,
|
|
<BCM6328_IRQ_EXT2>,
|
|
<BCM6328_IRQ_EXT3>;
|
|
};
|
|
|
|
periph_intc: interrupt-controller@10000020 {
|
|
#address-cells = <1>;
|
|
compatible = "brcm,bcm6345-l1-intc";
|
|
reg = <0x10000020 0x10>,
|
|
<0x10000030 0x10>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&cpu_intc>;
|
|
interrupts = <2>, <3>;
|
|
};
|
|
|
|
wdt: watchdog@1000005c {
|
|
compatible = "brcm,bcm7038-wdt";
|
|
reg = <0x1000005c 0xc>;
|
|
|
|
clocks = <&periph_osc>;
|
|
|
|
timeout-sec = <30>;
|
|
};
|
|
|
|
pll_cntl: syscon@10000068 {
|
|
compatible = "syscon", "simple-mfd";
|
|
reg = <0x10000068 0x4>;
|
|
native-endian;
|
|
|
|
syscon-reboot {
|
|
compatible = "syscon-reboot";
|
|
offset = <0>;
|
|
mask = <0x1>;
|
|
};
|
|
};
|
|
|
|
gpio_cntl: syscon@10000080 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "brcm,bcm6328-gpio-sysctl",
|
|
"syscon", "simple-mfd";
|
|
reg = <0x10000080 0x80>;
|
|
ranges = <0 0x10000080 0x80>;
|
|
native-endian;
|
|
|
|
gpio: gpio@0 {
|
|
compatible = "brcm,bcm6328-gpio";
|
|
reg-names = "dirout", "dat";
|
|
reg = <0x0 0x8>, <0x8 0x8>;
|
|
|
|
gpio-controller;
|
|
gpio-ranges = <&pinctrl 0 0 32>;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
pinctrl: pinctrl@18 {
|
|
compatible = "brcm,bcm6328-pinctrl";
|
|
reg = <0x18 0x10>;
|
|
|
|
pinctrl_serial_led: serial_led-pins {
|
|
pinctrl_serial_led_data: serial_led_data-pins {
|
|
function = "serial_led_data";
|
|
pins = "gpio6";
|
|
};
|
|
|
|
pinctrl_serial_led_clk: serial_led_clk-pins {
|
|
function = "serial_led_clk";
|
|
pins = "gpio7";
|
|
};
|
|
};
|
|
|
|
pinctrl_inet_act_led: inet_act_led-pins {
|
|
function = "inet_act_led";
|
|
pins = "gpio11";
|
|
};
|
|
|
|
pinctrl_pcie_clkreq: pcie_clkreq-pins {
|
|
function = "pcie_clkreq";
|
|
pins = "gpio16";
|
|
};
|
|
|
|
pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
|
|
function = "led";
|
|
pins = "gpio17";
|
|
};
|
|
|
|
pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
|
|
function = "led";
|
|
pins = "gpio18";
|
|
};
|
|
|
|
pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
|
|
function = "led";
|
|
pins = "gpio19";
|
|
};
|
|
|
|
pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
|
|
function = "led";
|
|
pins = "gpio20";
|
|
};
|
|
|
|
pinctrl_ephy0_act_led: ephy0_act_led-pins {
|
|
function = "ephy0_act_led";
|
|
pins = "gpio25";
|
|
};
|
|
|
|
pinctrl_ephy1_act_led: ephy1_act_led-pins {
|
|
function = "ephy1_act_led";
|
|
pins = "gpio26";
|
|
};
|
|
|
|
pinctrl_ephy2_act_led: ephy2_act_led-pins {
|
|
function = "ephy2_act_led";
|
|
pins = "gpio27";
|
|
};
|
|
|
|
pinctrl_ephy3_act_led: ephy3_act_led-pins {
|
|
function = "ephy3_act_led";
|
|
pins = "gpio28";
|
|
};
|
|
|
|
pinctrl_hsspi_cs1: hsspi_cs1-pins {
|
|
function = "hsspi_cs1";
|
|
pins = "hsspi_cs1";
|
|
};
|
|
|
|
pinctrl_usb_port1_device: usb_port1_device-pins {
|
|
function = "usb_device_port";
|
|
pins = "usb_port1";
|
|
};
|
|
|
|
pinctrl_usb_port1_host: usb_port1_host-pins {
|
|
function = "usb_host_port";
|
|
pins = "usb_port1";
|
|
};
|
|
};
|
|
};
|
|
|
|
uart0: serial@10000100 {
|
|
compatible = "brcm,bcm6345-uart";
|
|
reg = <0x10000100 0x18>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_UART0>;
|
|
|
|
clocks = <&periph_osc>;
|
|
clock-names = "periph";
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@10000120 {
|
|
compatible = "brcm,bcm6345-uart";
|
|
reg = <0x10000120 0x18>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_UART1>;
|
|
|
|
clocks = <&periph_osc>;
|
|
clock-names = "periph";
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
nflash: nand@10000200 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,nand-bcm6368",
|
|
"brcm,brcmnand-v2.2",
|
|
"brcm,brcmnand";
|
|
reg = <0x10000200 0x180>,
|
|
<0x10000400 0x200>,
|
|
<0x10000070 0x10>;
|
|
reg-names = "nand",
|
|
"nand-cache",
|
|
"nand-int-base";
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_NAND>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
leds: led-controller@10000800 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6328-leds";
|
|
reg = <0x10000800 0x24>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
hsspi: spi@10001000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6328-hsspi";
|
|
reg = <0x10001000 0x600>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_HSSPI>;
|
|
|
|
clocks = <&periph_clk BCM6328_CLK_HSSPI>,
|
|
<&hsspi_osc>;
|
|
clock-names = "hsspi",
|
|
"pll";
|
|
|
|
resets = <&periph_rst BCM6328_RST_SPI>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
serdes_cntl: syscon@10001800 {
|
|
compatible = "syscon";
|
|
reg = <0x10001800 0x4>;
|
|
native-endian;
|
|
};
|
|
|
|
periph_pwr: power-controller@10001848 {
|
|
compatible = "brcm,bcm6328-power-controller";
|
|
reg = <0x10001848 0x4>;
|
|
|
|
#power-domain-cells = <1>;
|
|
};
|
|
|
|
ehci: usb@10002500 {
|
|
compatible = "brcm,bcm6328-ehci", "generic-ehci";
|
|
reg = <0x10002500 0x100>;
|
|
big-endian;
|
|
spurious-oc;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_EHCI>;
|
|
|
|
phys = <&usbh 0>;
|
|
phy-names = "usb";
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
ohci: usb@10002600 {
|
|
compatible = "brcm,bcm6328-ohci", "generic-ohci";
|
|
reg = <0x10002600 0x100>;
|
|
big-endian;
|
|
no-big-frame-no;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_OHCI>;
|
|
|
|
phys = <&usbh 0>;
|
|
phy-names = "usb";
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
usbh: usb-phy@10002700 {
|
|
compatible = "brcm,bcm6328-usbh-phy";
|
|
reg = <0x10002700 0x38>;
|
|
|
|
#phy-cells = <1>;
|
|
|
|
clocks = <&periph_clk BCM6328_CLK_USBH>;
|
|
clock-names = "usbh";
|
|
|
|
power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
|
|
resets = <&periph_rst BCM6328_RST_USBH>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
ethernet: ethernet@1000d800 {
|
|
compatible = "brcm,bcm6328-enetsw";
|
|
reg = <0x1000d800 0x80>,
|
|
<0x1000da00 0x80>,
|
|
<0x1000dc00 0x80>;
|
|
reg-names = "dma",
|
|
"dma-channels",
|
|
"dma-sram";
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
|
|
<BCM6328_IRQ_ENETSW_TX_DMA0>;
|
|
interrupt-names = "rx",
|
|
"tx";
|
|
|
|
clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
|
|
|
|
resets = <&periph_rst BCM6328_RST_ENETSW>,
|
|
<&periph_rst BCM6328_RST_EPHY>;
|
|
|
|
power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
|
|
<&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
|
|
|
|
dma-rx = <0>;
|
|
dma-tx = <1>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
switch0: switch@10e00000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6328-switch";
|
|
reg = <0x10e00000 0x8000>;
|
|
big-endian;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@8 {
|
|
reg = <8>;
|
|
|
|
phy-mode = "internal";
|
|
ethernet = <ðernet>;
|
|
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
mdio: mdio@10e000b0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6368-mdio-mux";
|
|
reg = <0x10e000b0 0x8>;
|
|
|
|
mdio_int: mdio@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0>;
|
|
|
|
phy1: ethernet-phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <1>;
|
|
};
|
|
|
|
phy2: ethernet-phy@2 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <2>;
|
|
};
|
|
|
|
phy3: ethernet-phy@3 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <3>;
|
|
};
|
|
|
|
phy4: ethernet-phy@4 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <4>;
|
|
};
|
|
};
|
|
|
|
mdio_ext: mdio@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
pcie: pcie@10e40000 {
|
|
compatible = "brcm,bcm6328-pcie";
|
|
reg = <0x10e40000 0x10000>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
device_type = "pci";
|
|
bus-range = <0x00 0x01>;
|
|
ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
|
|
linux,pci-probe-only = <1>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6328_IRQ_PCIE_RC>;
|
|
|
|
clocks = <&periph_clk BCM6328_CLK_PCIE>;
|
|
clock-names = "pcie";
|
|
|
|
resets = <&periph_rst BCM6328_RST_PCIE>,
|
|
<&periph_rst BCM6328_RST_PCIE_EXT>,
|
|
<&periph_rst BCM6328_RST_PCIE_CORE>,
|
|
<&periph_rst BCM6328_RST_PCIE_HARD>;
|
|
reset-names = "pcie",
|
|
"pcie-ext",
|
|
"pcie-core",
|
|
"pcie-hard";
|
|
|
|
power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
|
|
|
|
brcm,serdes = <&serdes_cntl>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|