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openwrt/target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts
Álvaro Fernández Rojas 6bbb75dfdc bmips: dts: move leds dt-bindings include to SoCs
bmips has all the dt-bindings includes inside each SoC .dtsi files, so let's
move the new includes there instead of adding them to each board .dts files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2024-02-08 09:45:26 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later
#include "bcm63268.dtsi"
/ {
model = "Comtrend VR-3032u";
compatible = "comtrend,vr-3032u", "brcm,bcm63168", "brcm,bcm63268";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_green;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
};
};
&ehci {
status = "okay";
};
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cell-names = "mac-address";
};
&leds {
status = "okay";
brcm,serial-leds;
brcm,serial-dat-low;
brcm,serial-shift-inv;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial_led>;
led@0 {
/* GPHY0 Spd 0 */
reg = <0>;
brcm,hardware-controlled;
brcm,link-signal-sources = <0>;
};
led@1 {
/* GPHY0 Spd 1 */
reg = <1>;
brcm,hardware-controlled;
brcm,link-signal-sources = <1>;
};
led@2 {
reg = <2>;
active-low;
label = "red:internet";
};
led@3 {
reg = <3>;
active-low;
label = "green:dsl";
};
led@4 {
reg = <4>;
active-low;
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_GREEN>;
};
led@7 {
reg = <7>;
active-low;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_GREEN>;
};
led@8 {
reg = <8>;
active-low;
label = "green:internet";
};
led@9 {
/* EPHY0 Act */
reg = <9>;
brcm,hardware-controlled;
};
led@10 {
/* EPHY1 Act */
reg = <10>;
brcm,hardware-controlled;
};
led@11 {
/* EPHY2 Act */
reg = <11>;
brcm,hardware-controlled;
};
led@12 {
/* GPHY0 Act */
reg = <12>;
brcm,hardware-controlled;
};
led@13 {
/* EPHY0 Spd */
reg = <13>;
brcm,hardware-controlled;
};
led@14 {
/* EPHY1 Spd */
reg = <14>;
brcm,hardware-controlled;
};
led@15 {
/* EPHY2 Spd */
reg = <15>;
brcm,hardware-controlled;
};
led_power_green: led@20 {
reg = <20>;
active-low;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
};
};
&nflash {
status = "okay";
nandcs@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <15>;
nand-on-flash-bbt;
brcm,nand-oob-sector-size = <64>;
#address-cells = <1>;
#size-cells = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
compatible = "brcm,wfi-split";
label = "wfi";
reg = <0x0020000 0x7ac0000>;
};
};
};
};
&ohci {
status = "okay";
};
&switch0 {
ports {
port@0 {
reg = <0>;
label = "lan2";
phy-handle = <&phy1>;
phy-mode = "mii";
};
port@1 {
reg = <1>;
label = "lan3";
phy-handle = <&phy2>;
phy-mode = "mii";
};
port@2 {
reg = <2>;
label = "lan4";
phy-handle = <&phy3>;
phy-mode = "mii";
};
port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&phy4>;
phy-mode = "mii";
};
};
};
&uart0 {
status = "okay";
};
&usbh {
status = "okay";
};