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https://git.openwrt.org/openwrt/openwrt.git
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538a1d740c
The patches were generated from the RPi repo with the following command: git format-patch v6.6.58..rpi-6.6.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
170 lines
4.3 KiB
Diff
170 lines
4.3 KiB
Diff
From 3be1a52ad9e3ae7b0e16eb20c77d9df60e29f139 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 10 Sep 2024 14:07:16 +0100
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Subject: [PATCH 1298/1350] arm64: dts: Add preliminary bcm2712-rpi-500 dts
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Add the first DTS file for Pi 500.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm64/boot/dts/broadcom/Makefile | 1 +
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.../boot/dts/broadcom/bcm2712-rpi-500.dts | 142 ++++++++++++++++++
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2 files changed, 143 insertions(+)
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create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
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--- a/arch/arm64/boot/dts/broadcom/Makefile
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+++ b/arch/arm64/boot/dts/broadcom/Makefile
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@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4s.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-5-b.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2712d0-rpi-5-b.dtb
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+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-500.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm5io.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm4io.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5l-cm5io.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-500.dts
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@@ -0,0 +1,142 @@
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+// SPDX-License-Identifier: GPL-2.0
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+#include "bcm2712d0-rpi-5-b.dts"
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+
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+/ {
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+ compatible = "raspberrypi,500", "brcm,bcm2712";
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+ model = "Raspberry Pi 500";
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+};
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+
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+&pwr_key {
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+ debounce-interval = <400>;
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+};
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+
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+&gio {
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+ gpio-line-names =
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+ "", // GPIO_000
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+ "2712_BOOT_CS_N", // GPIO_001
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+ "2712_BOOT_MISO", // GPIO_002
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+ "2712_BOOT_MOSI", // GPIO_003
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+ "2712_BOOT_SCLK", // GPIO_004
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+ "", // GPIO_005
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+ "", // GPIO_006
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+ "", // GPIO_007
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+ "", // GPIO_008
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+ "", // GPIO_009
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+ "-", // GPIO_010
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+ "-", // GPIO_011
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+ "-", // GPIO_012
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+ "-", // GPIO_013
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+ "M2_DET_WAKE", // GPIO_014
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+ "M2_PWR_EN", // GPIO_015
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+ "", // GPIO_016
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+ "", // GPIO_017
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+ "KEYB_BOOTSEL", // GPIO_018
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+ "-", // GPIO_019
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+ "PWR_GPIO", // GPIO_020
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+ "KEYB_RUN", // GPIO_021
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+ "-", // GPIO_022
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+ "-", // GPIO_023
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+ "BT_RTS", // GPIO_024
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+ "BT_CTS", // GPIO_025
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+ "BT_TXD", // GPIO_026
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+ "BT_RXD", // GPIO_027
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+ "WL_ON", // GPIO_028
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+ "BT_ON", // GPIO_029
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+ "WIFI_SDIO_CLK", // GPIO_030
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+ "WIFI_SDIO_CMD", // GPIO_031
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+ "WIFI_SDIO_D0", // GPIO_032
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+ "WIFI_SDIO_D1", // GPIO_033
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+ "WIFI_SDIO_D2", // GPIO_034
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+ "WIFI_SDIO_D3"; // GPIO_035
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+};
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+
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+&gio_aon {
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+ gpio-line-names =
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+ "RP1_SDA", // AON_GPIO_00
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+ "RP1_SCL", // AON_GPIO_01
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+ "RP1_RUN", // AON_GPIO_02
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+ "SD_IOVDD_SEL", // AON_GPIO_03
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+ "SD_PWR_ON", // AON_GPIO_04
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+ "SD_CDET_N", // AON_GPIO_05
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+ "SD_FLG_N", // AON_GPIO_06
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+ "", // AON_GPIO_07
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+ "2712_WAKE", // AON_GPIO_08
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+ "2712_STAT_LED", // AON_GPIO_09
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+ "", // AON_GPIO_10
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+ "", // AON_GPIO_11
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+ "PMIC_INT", // AON_GPIO_12
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+ "UART_TX_FS", // AON_GPIO_13
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+ "UART_RX_FS", // AON_GPIO_14
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+ "", // AON_GPIO_15
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+ "", // AON_GPIO_16
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+
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+ // Pad bank0 out to 32 entries
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+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
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+
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+ "HDMI0_SCL", // AON_SGPIO_00
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+ "HDMI0_SDA", // AON_SGPIO_01
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+ "HDMI1_SCL", // AON_SGPIO_02
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+ "HDMI1_SDA", // AON_SGPIO_03
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+ "PMIC_SCL", // AON_SGPIO_04
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+ "PMIC_SDA"; // AON_SGPIO_05
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+};
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+
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+&rp1_gpio {
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+ gpio-line-names =
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+ "ID_SDA", // GPIO0
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+ "ID_SCL", // GPIO1
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+ "GPIO2", // GPIO2
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+ "GPIO3", // GPIO3
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+ "GPIO4", // GPIO4
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+ "GPIO5", // GPIO5
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+ "GPIO6", // GPIO6
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+ "GPIO7", // GPIO7
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+ "GPIO8", // GPIO8
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+ "GPIO9", // GPIO9
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+ "GPIO10", // GPIO10
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+ "GPIO11", // GPIO11
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+ "GPIO12", // GPIO12
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+ "GPIO13", // GPIO13
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+ "GPIO14", // GPIO14
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+ "GPIO15", // GPIO15
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+ "GPIO16", // GPIO16
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+ "GPIO17", // GPIO17
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+ "GPIO18", // GPIO18
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+ "GPIO19", // GPIO19
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+ "GPIO20", // GPIO20
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+ "GPIO21", // GPIO21
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+ "GPIO22", // GPIO22
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+ "GPIO23", // GPIO23
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+ "GPIO24", // GPIO24
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+ "GPIO25", // GPIO25
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+ "GPIO26", // GPIO26
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+ "GPIO27", // GPIO27
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+
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+ "PCIE_RP1_WAKE", // GPIO28
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+ "-", // GPIO29
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+ "HOST_SDA", // GPIO30
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+ "HOST_SCL", // GPIO31
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+ "ETH_RST_N", // GPIO32
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+ "PCIE_DET_WAKE", // GPIO33
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+
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+ "-", // GPIO34
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+ "-", // GPIO35
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+ "RP1_PCIE_CLKREQ_N", // GPIO36
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+ "-", // GPIO37
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+ "-", // GPIO38
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+ "-", // GPIO39
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+ "CD1_SDA", // GPIO40
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+ "CD1_SCL", // GPIO41
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+ "USB_VBUS_EN", // GPIO42
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+ "USB_OC_N", // GPIO43
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+ "RP1_STAT_LED", // GPIO44
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+ "-", // GPIO45
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+ "-", // GPIO46
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+ "HOST_WAKE", // GPIO47
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+ "-", // GPIO48
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+ "EN_MAX_USB_CUR", // GPIO49
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+ "-", // GPIO50
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+ "-", // GPIO51
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+ "-", // GPIO52
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+ "-"; // GPIO53
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+};
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