mirror of
https://git.openwrt.org/openwrt/openwrt.git
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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
140 lines
4.2 KiB
Diff
140 lines
4.2 KiB
Diff
From 35f84e1791eaae8c8c0f4798a5cba3061277a672 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Wed, 17 Apr 2024 17:03:56 +0100
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Subject: [PATCH 1028/1085] DTS: overlays: fix Pi 5 midi-over-UART
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The UART source clock is 50MHz not 100MHz, so fix the fake-clock used to
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munge the baudrate.
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See https://forums.raspberrypi.com/viewtopic.php?p=2212755
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts | 6 +++---
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arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts | 6 +++---
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arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts | 6 +++---
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arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts | 6 +++---
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arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts | 6 +++---
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5 files changed, 15 insertions(+), 15 deletions(-)
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--- a/arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
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@@ -5,10 +5,10 @@
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/*
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* Fake a higher clock rate to get a larger divisor, and thereby a lower
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- * baudrate. The real clock is 100MHz, which we scale so that requesting
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+ * baudrate. The real clock is 50MHz, which we scale so that requesting
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* 38.4kHz results in an actual 31.25kHz.
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*
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- * 100000000*38400/31250 = 122880000
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+ * 50000000*38400/31250 = 61440000
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*/
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/{
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@@ -21,7 +21,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "uart0_pclk";
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- clock-frequency = <122880000>;
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+ clock-frequency = <61440000>;
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};
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};
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};
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--- a/arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
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@@ -5,10 +5,10 @@
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/*
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* Fake a higher clock rate to get a larger divisor, and thereby a lower
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- * baudrate. The real clock is 100MHz, which we scale so that requesting
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+ * baudrate. The real clock is 50MHz, which we scale so that requesting
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* 38.4kHz results in an actual 31.25kHz.
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*
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- * 100000000*38400/31250 = 122880000
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+ * 50000000*38400/31250 = 61440000
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*/
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/{
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@@ -21,7 +21,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "uart1_pclk";
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- clock-frequency = <122880000>;
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+ clock-frequency = <61440000>;
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};
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};
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};
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--- a/arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
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@@ -5,10 +5,10 @@
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/*
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* Fake a higher clock rate to get a larger divisor, and thereby a lower
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- * baudrate. The real clock is 100MHz, which we scale so that requesting
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+ * baudrate. The real clock is 50MHz, which we scale so that requesting
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* 38.4kHz results in an actual 31.25kHz.
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*
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- * 100000000*38400/31250 = 122880000
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+ * 50000000*38400/31250 = 61440000
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*/
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/{
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@@ -21,7 +21,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "uart2_pclk";
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- clock-frequency = <122880000>;
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+ clock-frequency = <61440000>;
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};
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};
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};
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--- a/arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
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@@ -5,10 +5,10 @@
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/*
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* Fake a higher clock rate to get a larger divisor, and thereby a lower
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- * baudrate. The real clock is 100MHz, which we scale so that requesting
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+ * baudrate. The real clock is 50MHz, which we scale so that requesting
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* 38.4kHz results in an actual 31.25kHz.
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*
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- * 100000000*38400/31250 = 122880000
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+ * 50000000*38400/31250 = 61440000
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*/
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/{
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@@ -21,7 +21,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "uart3_pclk";
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- clock-frequency = <122880000>;
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+ clock-frequency = <61440000>;
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};
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};
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};
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--- a/arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
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@@ -5,10 +5,10 @@
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/*
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* Fake a higher clock rate to get a larger divisor, and thereby a lower
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- * baudrate. The real clock is 100MHz, which we scale so that requesting
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+ * baudrate. The real clock is 50MHz, which we scale so that requesting
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* 38.4kHz results in an actual 31.25kHz.
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*
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- * 100000000*38400/31250 = 122880000
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+ * 50000000*38400/31250 = 61440000
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*/
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/{
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@@ -21,7 +21,7 @@
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "uart4_pclk";
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- clock-frequency = <122880000>;
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+ clock-frequency = <61440000>;
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};
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};
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};
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