mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-11-22 04:56:15 +00:00
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
122 lines
3.4 KiB
Diff
122 lines
3.4 KiB
Diff
From 7b01a3d451734b9db47a7818ade3befc2fcb6a12 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 16 Nov 2023 16:03:47 +0000
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Subject: [PATCH 0824/1085] ARM: dts: bcm2712: Prune the non-D0 hardware
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There is no point describing hardware blocks in C0/1 that aren't also
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in D0, so delete them.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 2 -
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arch/arm/boot/dts/broadcom/bcm2712.dtsi | 66 -------------------
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2 files changed, 68 deletions(-)
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--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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@@ -24,8 +24,6 @@
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#define spi6 _spi6
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#define uart0 _uart0
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#define uart2 _uart2
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-#define uart3 _uart3
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-#define uart4 _uart4
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#define uart5 _uart5
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#include "bcm2712.dtsi"
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--- a/arch/arm/boot/dts/broadcom/bcm2712.dtsi
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+++ b/arch/arm/boot/dts/broadcom/bcm2712.dtsi
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@@ -197,28 +197,6 @@
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status = "disabled";
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};
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- uart3: serial@7d001600 {
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- compatible = "arm,pl011", "arm,primecell";
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- reg = <0x7d001600 0x200>;
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- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clk_uart>,
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- <&clk_vpu>;
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- clock-names = "uartclk", "apb_pclk";
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- arm,primecell-periphid = <0x00241011>;
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- status = "disabled";
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- };
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-
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- uart4: serial@7d001800 {
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- compatible = "arm,pl011", "arm,primecell";
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- reg = <0x7d001800 0x200>;
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- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clk_uart>,
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- <&clk_vpu>;
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- clock-names = "uartclk", "apb_pclk";
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- arm,primecell-periphid = <0x00241011>;
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- status = "disabled";
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- };
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-
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uart5: serial@7d001a00 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x7d001a00 0x200>;
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@@ -543,17 +521,6 @@
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status = "disabled";
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};
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- uartc: serial@7d50e000 {
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- compatible = "brcm,bcm7271-uart";
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- reg = <0x7d50e000 0x20>;
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- reg-names = "uart";
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- reg-shift = <2>;
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- reg-io-width = <4>;
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- interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
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- skip-init;
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- status = "disabled";
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- };
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-
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aon_intr: interrupt-controller@7d510600 {
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compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
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reg = <0x7d510600 0x30>;
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@@ -1103,30 +1070,6 @@
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brcm,msi-pci-addr = <0xff 0xffffe000>;
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};
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- genet: ethernet@1300000 {
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- compatible = "brcm,bcm2711-genet-v5";
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- reg = <0x10 0x01300000 0x0 0x20010>;
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- #address-cells = <0x1>;
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- #size-cells = <0x0>;
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- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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- status = "disabled";
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- phy-mode = "rgmii";
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- fixed-link = <0x0 0x1 0x3e8 0x0 0x0>;
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- phy-speed = <0x3e8>;
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- phy-id = <0x101>;
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- phy-type = <0x6>;
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- local-mac-address = [ 00 10 18 d8 45 de ];
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- device_type = "network";
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-
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- genet_mdio: mdio@e14 {
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- compatible = "brcm,genet-mdio-v5";
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- reg = <0xe14 0x8>;
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- #address-cells = <0x1>;
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- #size-cells = <0x0>;
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- };
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- };
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-
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syscon_piarbctl: syscon@400018 {
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compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
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reg = <0x10 0x00400018 0x0 0x18>;
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@@ -1188,15 +1131,6 @@
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mmc-ddr-3_3v;
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status = "disabled";
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};
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-
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- sdio0: mmc@1108000 {
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- compatible = "brcm,bcm2711-emmc2";
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- reg = <0x10 0x01108000 0x0 0x100>;
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- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clk_emmc2>;
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- mmc-ddr-3_3v;
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- status = "disabled";
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- };
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bcm_reset: reset-controller@1504318 {
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compatible = "brcm,brcmstb-reset";
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