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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
60 lines
1.9 KiB
Diff
60 lines
1.9 KiB
Diff
From 9d5ee85bf2da64748bbec41deba5a432eb23f959 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 14 Apr 2023 17:47:11 +0200
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Subject: [PATCH 0617/1085] drm/vc4: txp: Handle 40-bits DMA Addresses
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The BCM2712 MOP and MOPLET can handle addresses larger than 32bits
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through an extra register. We can easily support it and make it
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conditional based on the compatible through a boolean in our variant
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structure.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 1 +
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drivers/gpu/drm/vc4/vc4_txp.c | 10 +++++++++-
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2 files changed, 10 insertions(+), 1 deletion(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -550,6 +550,7 @@ struct vc4_txp_data {
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struct vc4_crtc_data base;
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unsigned int has_byte_enable:1;
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unsigned int size_minus_one:1;
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+ unsigned int supports_40bit_addresses:1;
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};
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extern const struct vc4_txp_data bcm2835_txp_data;
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--- a/drivers/gpu/drm/vc4/vc4_txp.c
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+++ b/drivers/gpu/drm/vc4/vc4_txp.c
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@@ -145,6 +145,8 @@
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/* Number of lines received and committed to memory. */
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#define TXP_PROGRESS 0x10
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+#define TXP_DST_PTR_HIGH 0x1c
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+
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#define TXP_READ(offset) \
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({ \
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kunit_fail_current_test("Accessing a register in a unit test!\n"); \
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@@ -293,6 +295,7 @@ static void vc4_txp_connector_atomic_com
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struct drm_framebuffer *fb;
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unsigned int hdisplay;
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unsigned int vdisplay;
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+ dma_addr_t addr;
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u32 ctrl;
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int idx;
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int i;
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@@ -330,7 +333,12 @@ static void vc4_txp_connector_atomic_com
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return;
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gem = drm_fb_dma_get_gem_obj(fb, 0);
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- TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]);
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+ addr = gem->dma_addr + fb->offsets[0];
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+ TXP_WRITE(TXP_DST_PTR, lower_32_bits(addr));
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+
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+ if (txp_data->supports_40bit_addresses)
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+ TXP_WRITE(TXP_DST_PTR_HIGH, upper_32_bits(addr) & 0xff);
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+
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TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
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hdisplay = mode->hdisplay ?: 1;
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