mirror of
https://git.openwrt.org/openwrt/openwrt.git
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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
78 lines
2.6 KiB
Diff
78 lines
2.6 KiB
Diff
From c4a150395456251faafdb3aa8d726db7b1c74d17 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Wed, 24 May 2023 19:32:16 +0100
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Subject: [PATCH 0566/1085] dmaengine: bcm2835: Fix dma driver for BCM2835-38
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The previous commit broke support on older devices.
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Make the breaking parts of patch conditional on
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the device being used.
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Fixes: 6e1856ac7c39 ("dmaengine: bcm2835: HACK: Support DMA-Lite channels")
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/dma/bcm2835-dma.c | 17 +++++++++++++----
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1 file changed, 13 insertions(+), 4 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -102,6 +102,7 @@ struct bcm2835_chan {
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bool is_lite_channel;
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bool is_40bit_channel;
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+ bool is_2712;
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};
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struct bcm2835_desc {
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@@ -550,7 +551,11 @@ static struct bcm2835_desc *bcm2835_dma_
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control_block->info = info;
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control_block->src = src;
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control_block->dst = dst;
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- control_block->stride = (upper_32_bits(dst) << 8) | upper_32_bits(src);
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+ if (c->is_2712)
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+ control_block->stride = (upper_32_bits(dst) << 8) |
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+ upper_32_bits(src);
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+ else
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+ control_block->stride = 0;
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control_block->next = 0;
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}
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@@ -575,7 +580,8 @@ static struct bcm2835_desc *bcm2835_dma_
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d->cb_list[frame - 1].cb)->next_cb =
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to_40bit_cbaddr(cb_entry->paddr);
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if (frame && !c->is_40bit_channel)
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- d->cb_list[frame - 1].cb->next = to_40bit_cbaddr(cb_entry->paddr);
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+ d->cb_list[frame - 1].cb->next = c->is_2712 ?
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+ to_40bit_cbaddr(cb_entry->paddr) : cb_entry->paddr;
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/* update src and dst and length */
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if (src && (info & BCM2835_DMA_S_INC)) {
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@@ -762,7 +768,7 @@ static void bcm2835_dma_start_desc(struc
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} else {
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writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
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- writel(to_40bit_cbaddr(d->cb_list[0].paddr),
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+ writel(c->is_2712 ? to_40bit_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr,
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c->chan_base + BCM2835_DMA_ADDR);
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writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
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c->chan_base + BCM2835_DMA_CS);
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@@ -1132,7 +1138,8 @@ static struct dma_async_tx_descriptor *b
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d->cb_list[frames - 1].cb)->next_cb =
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to_40bit_cbaddr(d->cb_list[0].paddr);
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else
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- d->cb_list[d->frames - 1].cb->next = to_40bit_cbaddr(d->cb_list[0].paddr);
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+ d->cb_list[d->frames - 1].cb->next = c->is_2712 ?
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+ to_40bit_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr;
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return vchan_tx_prep(&c->vc, &d->vd, flags);
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}
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@@ -1199,6 +1206,8 @@ static int bcm2835_dma_chan_init(struct
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else if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
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BCM2835_DMA_DEBUG_LITE)
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c->is_lite_channel = true;
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+ if (d->cfg_data->dma_mask == DMA_BIT_MASK(40))
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+ c->is_2712 = true;
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return 0;
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}
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