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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
40 lines
1.5 KiB
Diff
40 lines
1.5 KiB
Diff
From 78a1315a44243385c57289a2c30f3b25de87b603 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 11 Aug 2022 13:59:34 +0100
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Subject: [PATCH 0036/1085] drm/vc4: Set AXI panic modes for the HVS
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The HVS can change AXI request mode based on how full the COB
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FIFOs are.
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Until now the vc4 driver has been relying on the firmware to
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have set these to sensible values.
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With HVS channel 2 now being used for live video, change the
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panic mode for all channels to be explicitly set by the driver,
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and the same for all channels.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_hvs.c | 11 +++++++++++
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1 file changed, 11 insertions(+)
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -1363,6 +1363,17 @@ static int vc4_hvs_bind(struct device *d
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dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1);
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dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2);
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+ /* Set AXI panic mode.
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+ * VC4 panics when < 2 lines in FIFO.
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+ * VC5 panics when less than 1 line in the FIFO.
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+ */
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+ dispctrl &= ~(SCALER_DISPCTRL_PANIC0_MASK |
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+ SCALER_DISPCTRL_PANIC1_MASK |
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+ SCALER_DISPCTRL_PANIC2_MASK);
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+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC0);
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+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1);
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+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2);
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+
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HVS_WRITE(SCALER_DISPCTRL, dispctrl);
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/* Recompute Composite Output Buffer (COB) allocations for the displays
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