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74f2df9dbc
Replacement can be done with nvmem. Signed-off-by: Rosen Penev <rosenp@gmail.com>
219 lines
3.7 KiB
Plaintext
219 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca955x.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "librerouter,librerouter-v1", "qca,qca9558";
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model = "LibreRouter v1";
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aliases {
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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};
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leds {
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compatible = "gpio-leds";
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led_system: system {
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label = "green:system";
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gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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wifi_green {
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label = "green:wlan2g";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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status_blue {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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/* GPIO1 (poe_pass) and GPIO2 (watchdog) requires jtag disabled */
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pinctrl-0 = <&jtag_disable_pins>;
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reset {
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label = "Reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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watchdog {
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compatible = "linux,wdt-gpio";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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hw_algo = "toggle";
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hw_margin_ms = <1000>;
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always-running;
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};
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};
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&pcie0 {
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status = "okay";
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wifi@0,0 {
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compatible = "pci168c,0033";
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reg = <0x0000 0 0 0 0>;
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};
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};
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&pcie1 {
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status = "okay";
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wifi@0,0 {
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compatible = "pci168c,0033";
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reg = <0x0000 0 0 0 0>;
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};
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};
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&usb_phy0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb_phy1 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x050000 0x7c0000>;
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};
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partition@810000 {
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label = "fw2";
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reg = <0x810000 0x7d0000>;
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};
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partition@fd0000 {
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label = "res";
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reg = <0xfd0000 0x20000>;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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macaddr_art_c: macaddr@c {
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reg = <0xc 0x6>;
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};
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cal_art_1000: calibration@1000 {
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reg = <0x1000 0x440>;
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};
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};
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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0x04 0x87600000 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, rx_delay 10 */
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0x0c 0x00000080 /* PORT6: SGMII */
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0x10 0x81000080 /* POWER_ON_STRAP: LED open drain, SerDes auto-neg disabled */
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0x50 0xcf37cf37 /* LED_CTRL0 */
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0x54 0xcf37cf37 /* LED_CTRL1 */
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0x58 0xcf37cf37 /* LED_CTRL2 */
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0x5c 0x0 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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0x94 0x0000007e /* PORT6 STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0xa6000000 0x00000101 0x00001616>;
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&phy0>;
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};
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ð1 {
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status = "okay";
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pll-data = <0x03000101 0x00000101 0x00001616>;
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nvmem-cells = <&macaddr_art_6>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&wmac {
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status = "okay";
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nvmem-cells = <&macaddr_art_c>, <&cal_art_1000>;
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nvmem-cell-names = "mac-address", "calibration";
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};
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