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openwrt/target/linux/ath79/dts/qca953x.dtsi
Shiji Yang 731318667d ath79: correct dts ngpios properties
SoC Model	GPIO number

ar7100		12
ar7240		18(unknown, default)
ar7241		20
ar7242		18
ar9132		22(unknown, default)
ar9331		30
ar934x		23
qca953x		18
qca955x		24
qca956x		23

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/15784
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-07-04 19:30:37 +02:00

295 lines
5.5 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ath79.dtsi"
/ {
compatible = "qca,qca9530";
#address-cells = <1>;
#size-cells = <1>;
chosen {
bootargs = "console=ttyS0,115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips24Kc";
clocks = <&pll ATH79_CLK_CPU>;
reg = <0>;
};
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
clock-frequency = <25000000>;
};
ahb {
apb {
ddr_ctrl: memory-controller@18000000 {
compatible = "qca,qca9530-ddr-controller",
"qca,ar7240-ddr-controller";
reg = <0x18000000 0x128>;
#qca,ddr-wb-channel-cells = <1>;
};
uart: uart@18020000 {
compatible = "ns16550a";
reg = <0x18020000 0x20>;
interrupts = <3>;
clocks = <&pll ATH79_CLK_REF>;
clock-names = "uart";
reg-io-width = <4>;
reg-shift = <2>;
no-loopback-test;
};
usb_phy: usb-phy@18030000 {
compatible = "qca,ar7200-usb-phy";
reg = <0x18030000 0x100>;
#phy-cells = <0>;
reset-names = "usb-phy-analog", "usb-phy", "usb-suspend-override";
resets = <&rst 11>, <&rst 4>, <&rst 3>;
status = "disabled";
};
gpio: gpio@18040000 {
compatible = "qca,qca9530-gpio",
"qca,ar9340-gpio";
reg = <0x18040000 0x28>;
interrupts = <2>;
ngpios = <18>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pinmux: pinmux@1804002c {
compatible = "pinctrl-single";
reg = <0x1804002c 0x48>;
#size-cells = <0>;
pinctrl-single,bit-per-mux;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
#pinctrl-cells = <2>;
jtag_disable_pins: pinmux_jtag_disable_pins {
pinctrl-single,bits = <0x40 0x2 0x2>;
};
};
pll: pll-controller@18050000 {
compatible = "qca,qca9530-pll", "syscon";
reg = <0x18050000 0x48>;
#clock-cells = <1>;
clock-output-names = "cpu", "ddr", "ahb";
clocks = <&extosc>;
clock-names = "ref";
};
wdt: wdt@18060008 {
compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
reg = <0x18060008 0x8>;
interrupts = <4>;
clocks = <&pll ATH79_CLK_AHB>;
clock-names = "wdt";
};
rst: reset-controller@1806001c {
compatible = "qca,qca9530-reset",
"qca,ar7100-reset";
reg = <0x1806001c 0xac>;
#reset-cells = <1>;
intc2: interrupt-controller {
compatible = "qca,ar9340-intc";
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-controller;
#interrupt-cells = <1>;
qca,int-status-addr = <0xac>;
qca,pending-bits = <0xf>, /* wmac */
<0x1f0>; /* pcie rc1 */
qca,ddr-wb-channel-interrupts = <0>, <1>;
qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
};
};
};
gmac: gmac@18070000 {
compatible = "qca,ar9330-gmac";
reg = <0x18070000 0x4>;
};
pcie0: pcie@180c0000 {
compatible = "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0x0>;
reg = <0x180c0000 0x1000>, /* CRP */
<0x180f0000 0x100>, /* CTRL */
<0x14000000 0x1000>; /* CFG */
reg-names = "crp_base", "ctrl_base", "cfg_base";
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
interrupt-parent = <&intc2>;
interrupts = <1>;
device_type = "pci";
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 1>;
interrupt-map = <0 0 0 0 &pcie0 0>;
status = "disabled";
};
wmac: wmac@18100000 {
compatible = "qca,qca9530-wmac";
reg = <0x18100000 0x20000>;
interrupt-parent = <&intc2>;
interrupts = <0>;
status = "disabled";
};
usb0: usb@1b000000 {
compatible = "generic-ehci";
reg = <0x1b000000 0x1000>;
interrupts = <3>;
resets = <&rst 5>;
reset-names = "usb-host";
dr_mode = "host";
has-transaction-translator;
caps-offset = <0x100>;
phy-names = "usb-phy";
phys = <&usb_phy>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
spi: spi@1f000000 {
compatible = "qca,ar934x-spi";
reg = <0x1f000000 0x1c>;
clocks = <&pll ATH79_CLK_AHB>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&cpuintc {
qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
<&ddr_ctrl 1>;
};
&eth0 {
compatible = "qca,qca9530-eth", "syscon";
pll-data = <0x82000101 0x80000101 0x80001313>;
reg = <0x19000000 0x200
0x18070000 0x4>;
pll-reg = <0x4 0x2c 17>;
pll-handle = <&pll>;
reset-names = "mac";
resets = <&rst 9>;
};
&mdio1 {
status = "okay";
resets = <&rst 23>;
reset-names = "mdio";
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8229";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
phy-mode = "gmii";
qca,phy4-mii-enable;
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
swphy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "mii";
};
swphy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
};
};
&eth1 {
status = "okay";
compatible = "qca,qca9530-eth", "syscon";
resets = <&rst 13>;
reset-names = "mac";
phy-mode = "gmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};