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9131cb44ff
Introduce EN7581 SoC support with currently rfb board supported. This is a new 64bit SoC from Airoha that is currently almost fully supported upstream with only the DTS missing. Setting source-only waiting for the full upstream support to be completed. Link: https://github.com/openwrt/openwrt/pull/16730 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
30 lines
1.1 KiB
Diff
30 lines
1.1 KiB
Diff
From 2c2313c84ad7c0e5e39fbd98559d40f6b9ec1f83 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Wed, 18 Sep 2024 15:32:53 +0200
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Subject: [PATCH 2/4] phy: airoha: Fix REG_PCIE_PMA_TX_RESET config in
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airoha_pcie_phy_init_csr_2l()
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Fix typos configuring REG_PCIE_PMA_TX_RESET register in
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airoha_pcie_phy_init_csr_2l routine for lane0 and lane1
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Fixes: d7d2818b9383 ("phy: airoha: Add PCIe PHY driver for EN7581 SoC.")
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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---
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drivers/phy/phy-airoha-pcie.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/phy/phy-airoha-pcie.c
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+++ b/drivers/phy/phy-airoha-pcie.c
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@@ -471,9 +471,9 @@ static void airoha_pcie_phy_init_csr_2l(
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PCIE_SW_XFI_RXPCS_RST | PCIE_SW_REF_RST |
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PCIE_SW_RX_RST);
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airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_TX_RESET,
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- PCIE_TX_TOP_RST | REG_PCIE_PMA_TX_RESET);
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+ PCIE_TX_TOP_RST | PCIE_TX_CAL_RST);
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airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_TX_RESET,
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- PCIE_TX_TOP_RST | REG_PCIE_PMA_TX_RESET);
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+ PCIE_TX_TOP_RST | PCIE_TX_CAL_RST);
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}
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static void airoha_pcie_phy_init_rx(struct airoha_pcie_phy *pcie_phy)
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