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9131cb44ff
Introduce EN7581 SoC support with currently rfb board supported. This is a new 64bit SoC from Airoha that is currently almost fully supported upstream with only the DTS missing. Setting source-only waiting for the full upstream support to be completed. Link: https://github.com/openwrt/openwrt/pull/16730 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
307 lines
9.0 KiB
Diff
307 lines
9.0 KiB
Diff
From 9a2500ab22f059e596942172a8e4a60ae8243ce4 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Thu, 1 Aug 2024 16:35:06 +0200
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Subject: [PATCH 4/8] net: airoha: Add airoha_qdma pointer in
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airoha_tx_irq_queue/airoha_queue structures
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Move airoha_eth pointer in airoha_qdma structure from
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airoha_tx_irq_queue/airoha_queue ones. This is a preliminary patch to
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introduce support for multi-QDMA controllers available on EN7581.
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Link: https://patch.msgid.link/074565b82fd0ceefe66e186f21133d825dbd48eb.1722522582.git.lorenzo@kernel.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/airoha_eth.c | 84 +++++++++++-----------
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1 file changed, 41 insertions(+), 43 deletions(-)
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--- a/drivers/net/ethernet/mediatek/airoha_eth.c
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+++ b/drivers/net/ethernet/mediatek/airoha_eth.c
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@@ -728,7 +728,7 @@ struct airoha_queue_entry {
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};
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struct airoha_queue {
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- struct airoha_eth *eth;
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+ struct airoha_qdma *qdma;
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/* protect concurrent queue accesses */
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spinlock_t lock;
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@@ -747,7 +747,7 @@ struct airoha_queue {
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};
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struct airoha_tx_irq_queue {
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- struct airoha_eth *eth;
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+ struct airoha_qdma *qdma;
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struct napi_struct napi;
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u32 *q;
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@@ -784,6 +784,7 @@ struct airoha_hw_stats {
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};
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struct airoha_qdma {
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+ struct airoha_eth *eth;
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void __iomem *regs;
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/* protect concurrent irqmask accesses */
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@@ -1388,8 +1389,8 @@ static int airoha_fe_init(struct airoha_
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static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)
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{
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enum dma_data_direction dir = page_pool_get_dma_dir(q->page_pool);
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- struct airoha_qdma *qdma = &q->eth->qdma[0];
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- struct airoha_eth *eth = q->eth;
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+ struct airoha_qdma *qdma = q->qdma;
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+ struct airoha_eth *eth = qdma->eth;
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int qid = q - &qdma->q_rx[0];
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int nframes = 0;
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@@ -1457,8 +1458,8 @@ static int airoha_qdma_get_gdm_port(stru
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static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)
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{
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enum dma_data_direction dir = page_pool_get_dma_dir(q->page_pool);
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- struct airoha_qdma *qdma = &q->eth->qdma[0];
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- struct airoha_eth *eth = q->eth;
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+ struct airoha_qdma *qdma = q->qdma;
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+ struct airoha_eth *eth = qdma->eth;
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int qid = q - &qdma->q_rx[0];
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int done = 0;
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@@ -1521,7 +1522,6 @@ static int airoha_qdma_rx_process(struct
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static int airoha_qdma_rx_napi_poll(struct napi_struct *napi, int budget)
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{
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struct airoha_queue *q = container_of(napi, struct airoha_queue, napi);
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- struct airoha_qdma *qdma = &q->eth->qdma[0];
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int cur, done = 0;
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do {
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@@ -1530,14 +1530,13 @@ static int airoha_qdma_rx_napi_poll(stru
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} while (cur && done < budget);
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if (done < budget && napi_complete(napi))
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- airoha_qdma_irq_enable(qdma, QDMA_INT_REG_IDX1,
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+ airoha_qdma_irq_enable(q->qdma, QDMA_INT_REG_IDX1,
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RX_DONE_INT_MASK);
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return done;
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}
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-static int airoha_qdma_init_rx_queue(struct airoha_eth *eth,
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- struct airoha_queue *q,
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+static int airoha_qdma_init_rx_queue(struct airoha_queue *q,
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struct airoha_qdma *qdma, int ndesc)
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{
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const struct page_pool_params pp_params = {
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@@ -1548,15 +1547,16 @@ static int airoha_qdma_init_rx_queue(str
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.dma_dir = DMA_FROM_DEVICE,
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.max_len = PAGE_SIZE,
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.nid = NUMA_NO_NODE,
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- .dev = eth->dev,
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+ .dev = qdma->eth->dev,
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.napi = &q->napi,
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};
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+ struct airoha_eth *eth = qdma->eth;
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int qid = q - &qdma->q_rx[0], thr;
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dma_addr_t dma_addr;
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q->buf_size = PAGE_SIZE / 2;
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q->ndesc = ndesc;
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- q->eth = eth;
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+ q->qdma = qdma;
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q->entry = devm_kzalloc(eth->dev, q->ndesc * sizeof(*q->entry),
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GFP_KERNEL);
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@@ -1596,7 +1596,7 @@ static int airoha_qdma_init_rx_queue(str
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static void airoha_qdma_cleanup_rx_queue(struct airoha_queue *q)
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{
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- struct airoha_eth *eth = q->eth;
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+ struct airoha_eth *eth = q->qdma->eth;
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while (q->queued) {
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struct airoha_queue_entry *e = &q->entry[q->tail];
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@@ -1610,8 +1610,7 @@ static void airoha_qdma_cleanup_rx_queue
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}
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}
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-static int airoha_qdma_init_rx(struct airoha_eth *eth,
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- struct airoha_qdma *qdma)
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+static int airoha_qdma_init_rx(struct airoha_qdma *qdma)
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{
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int i;
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@@ -1623,8 +1622,8 @@ static int airoha_qdma_init_rx(struct ai
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continue;
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}
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- err = airoha_qdma_init_rx_queue(eth, &qdma->q_rx[i],
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- qdma, RX_DSCP_NUM(i));
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+ err = airoha_qdma_init_rx_queue(&qdma->q_rx[i], qdma,
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+ RX_DSCP_NUM(i));
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if (err)
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return err;
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}
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@@ -1640,9 +1639,9 @@ static int airoha_qdma_tx_napi_poll(stru
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int id, done = 0;
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irq_q = container_of(napi, struct airoha_tx_irq_queue, napi);
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- eth = irq_q->eth;
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- qdma = ð->qdma[0];
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+ qdma = irq_q->qdma;
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id = irq_q - &qdma->q_tx_irq[0];
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+ eth = qdma->eth;
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while (irq_q->queued > 0 && done < budget) {
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u32 qid, last, val = irq_q->q[irq_q->head];
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@@ -1724,16 +1723,16 @@ static int airoha_qdma_tx_napi_poll(stru
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return done;
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}
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-static int airoha_qdma_init_tx_queue(struct airoha_eth *eth,
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- struct airoha_queue *q,
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+static int airoha_qdma_init_tx_queue(struct airoha_queue *q,
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struct airoha_qdma *qdma, int size)
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{
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+ struct airoha_eth *eth = qdma->eth;
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int i, qid = q - &qdma->q_tx[0];
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dma_addr_t dma_addr;
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spin_lock_init(&q->lock);
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q->ndesc = size;
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- q->eth = eth;
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+ q->qdma = qdma;
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q->free_thr = 1 + MAX_SKB_FRAGS;
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q->entry = devm_kzalloc(eth->dev, q->ndesc * sizeof(*q->entry),
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@@ -1762,11 +1761,11 @@ static int airoha_qdma_init_tx_queue(str
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return 0;
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}
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-static int airoha_qdma_tx_irq_init(struct airoha_eth *eth,
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- struct airoha_tx_irq_queue *irq_q,
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+static int airoha_qdma_tx_irq_init(struct airoha_tx_irq_queue *irq_q,
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struct airoha_qdma *qdma, int size)
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{
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int id = irq_q - &qdma->q_tx_irq[0];
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+ struct airoha_eth *eth = qdma->eth;
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dma_addr_t dma_addr;
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netif_napi_add_tx(eth->napi_dev, &irq_q->napi,
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@@ -1778,7 +1777,7 @@ static int airoha_qdma_tx_irq_init(struc
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memset(irq_q->q, 0xff, size * sizeof(u32));
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irq_q->size = size;
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- irq_q->eth = eth;
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+ irq_q->qdma = qdma;
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airoha_qdma_wr(qdma, REG_TX_IRQ_BASE(id), dma_addr);
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airoha_qdma_rmw(qdma, REG_TX_IRQ_CFG(id), TX_IRQ_DEPTH_MASK,
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@@ -1789,21 +1788,20 @@ static int airoha_qdma_tx_irq_init(struc
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return 0;
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}
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-static int airoha_qdma_init_tx(struct airoha_eth *eth,
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- struct airoha_qdma *qdma)
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+static int airoha_qdma_init_tx(struct airoha_qdma *qdma)
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{
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int i, err;
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for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++) {
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- err = airoha_qdma_tx_irq_init(eth, &qdma->q_tx_irq[i],
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- qdma, IRQ_QUEUE_LEN(i));
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+ err = airoha_qdma_tx_irq_init(&qdma->q_tx_irq[i], qdma,
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+ IRQ_QUEUE_LEN(i));
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if (err)
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return err;
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}
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for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
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- err = airoha_qdma_init_tx_queue(eth, &qdma->q_tx[i],
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- qdma, TX_DSCP_NUM);
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+ err = airoha_qdma_init_tx_queue(&qdma->q_tx[i], qdma,
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+ TX_DSCP_NUM);
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if (err)
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return err;
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}
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@@ -1813,7 +1811,7 @@ static int airoha_qdma_init_tx(struct ai
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static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)
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{
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- struct airoha_eth *eth = q->eth;
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+ struct airoha_eth *eth = q->qdma->eth;
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spin_lock_bh(&q->lock);
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while (q->queued) {
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@@ -1830,9 +1828,9 @@ static void airoha_qdma_cleanup_tx_queue
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spin_unlock_bh(&q->lock);
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}
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-static int airoha_qdma_init_hfwd_queues(struct airoha_eth *eth,
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- struct airoha_qdma *qdma)
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+static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
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{
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+ struct airoha_eth *eth = qdma->eth;
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dma_addr_t dma_addr;
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u32 status;
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int size;
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@@ -1870,8 +1868,7 @@ static int airoha_qdma_init_hfwd_queues(
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REG_LMGR_INIT_CFG);
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}
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-static void airoha_qdma_init_qos(struct airoha_eth *eth,
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- struct airoha_qdma *qdma)
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+static void airoha_qdma_init_qos(struct airoha_qdma *qdma)
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{
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airoha_qdma_clear(qdma, REG_TXWRR_MODE_CFG, TWRR_WEIGHT_SCALE_MASK);
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airoha_qdma_set(qdma, REG_TXWRR_MODE_CFG, TWRR_WEIGHT_BASE_MASK);
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@@ -1921,8 +1918,7 @@ static void airoha_qdma_init_qos(struct
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FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));
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}
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-static int airoha_qdma_hw_init(struct airoha_eth *eth,
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- struct airoha_qdma *qdma)
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+static int airoha_qdma_hw_init(struct airoha_qdma *qdma)
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{
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int i;
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@@ -1959,7 +1955,7 @@ static int airoha_qdma_hw_init(struct ai
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GLOBAL_CFG_TX_WB_DONE_MASK |
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FIELD_PREP(GLOBAL_CFG_MAX_ISSUE_NUM_MASK, 2));
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- airoha_qdma_init_qos(eth, qdma);
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+ airoha_qdma_init_qos(qdma);
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/* disable qdma rx delay interrupt */
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for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
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@@ -2035,6 +2031,8 @@ static int airoha_qdma_init(struct platf
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int err;
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spin_lock_init(&qdma->irq_lock);
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+ qdma->eth = eth;
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+
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qdma->irq = platform_get_irq(pdev, 0);
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if (qdma->irq < 0)
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return qdma->irq;
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@@ -2044,19 +2042,19 @@ static int airoha_qdma_init(struct platf
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if (err)
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return err;
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- err = airoha_qdma_init_rx(eth, qdma);
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+ err = airoha_qdma_init_rx(qdma);
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if (err)
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return err;
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- err = airoha_qdma_init_tx(eth, qdma);
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+ err = airoha_qdma_init_tx(qdma);
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if (err)
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return err;
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- err = airoha_qdma_init_hfwd_queues(eth, qdma);
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+ err = airoha_qdma_init_hfwd_queues(qdma);
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if (err)
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return err;
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- err = airoha_qdma_hw_init(eth, qdma);
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+ err = airoha_qdma_hw_init(qdma);
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if (err)
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return err;
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