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openwrt/target/linux/airoha/patches-6.12/600-09-dt-bindings-clock-airoha-Document-support-for-AN7583.patch
Christian Marangi c5b12fc02a airoha: Introduce support for Airoha AN7583 SoC
Introduce initial support for Airoha AN7583 SoC and add all the required
patch for basic functionality of the SoC.

Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on
the PHY handling and Serdes. It can be see as a lower spec of EN7581
with modern and simplified implementations.

All the patch are sent upstream and are pending revision. Support for
PCIe and USB will come later as soon as DT structure is accepted
upstream.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-09-26 05:00:07 +02:00

123 lines
3.8 KiB
Diff

From 12838dd20851a6eae67061c5f195f31981a4d8c1 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 28 May 2025 02:39:35 +0200
Subject: [PATCH 09/10] dt-bindings: clock: airoha: Document support for AN7583
clock
Document support for Airoha AN7583 clock. This is based on the EN7523
clock schema with the new requirement of the "airoha,chip-scu"
(previously optional for EN7581).
Add additional binding for additional clock and reset lines.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
.../bindings/clock/airoha,en7523-scu.yaml | 9 +++
include/dt-bindings/clock/en7523-clk.h | 3 +
.../dt-bindings/reset/airoha,an7583-reset.h | 61 +++++++++++++++++++
3 files changed, 73 insertions(+)
create mode 100644 include/dt-bindings/reset/airoha,an7583-reset.h
# diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
# index bce77a14c938..be9759b86fdc 100644
# --- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
# +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
# @@ -32,6 +32,7 @@ properties:
# - enum:
# - airoha,en7523-scu
# - airoha,en7581-scu
# + - airoha,an7583-scu
# reg:
# items:
# @@ -82,6 +83,14 @@ allOf:
# reg:
# maxItems: 1
# + - if:
# + properties:
# + compatible:
# + const: airoha,an7583-scu
# + then:
# + required:
# + - airoha,chip-scu
# +
# additionalProperties: false
# examples:
--- a/include/dt-bindings/clock/en7523-clk.h
+++ b/include/dt-bindings/clock/en7523-clk.h
@@ -14,4 +14,7 @@
#define EN7581_CLK_EMMC 8
+#define AN7583_CLK_MDIO0 9
+#define AN7583_CLK_MDIO1 10
+
#endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
--- /dev/null
+++ b/include/dt-bindings/reset/airoha,an7583-reset.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2024 AIROHA Inc
+ * Author: Christian Marangi <ansuelsmth@gmail.com>
+ */
+
+#ifndef __DT_BINDINGS_RESET_CONTROLLER_AIROHA_AN7583_H_
+#define __DT_BINDINGS_RESET_CONTROLLER_AIROHA_AN7583_H_
+
+/* RST_CTRL2 */
+#define AN7583_XPON_PHY_RST 0
+#define AN7583_GPON_OLT_RST 1
+#define AN7583_CPU_TIMER2_RST 2
+#define AN7583_HSUART_RST 3
+#define AN7583_UART4_RST 4
+#define AN7583_UART5_RST 5
+#define AN7583_I2C2_RST 6
+#define AN7583_XSI_MAC_RST 7
+#define AN7583_XSI_PHY_RST 8
+#define AN7583_NPU_RST 9
+#define AN7583_TRNG_MSTART_RST 10
+#define AN7583_DUAL_HSI0_RST 11
+#define AN7583_DUAL_HSI1_RST 12
+#define AN7583_DUAL_HSI0_MAC_RST 13
+#define AN7583_DUAL_HSI1_MAC_RST 14
+#define AN7583_XPON_XFI_RST 15
+#define AN7583_WDMA_RST 16
+#define AN7583_WOE0_RST 17
+#define AN7583_HSDMA_RST 18
+#define AN7583_TDMA_RST 19
+#define AN7583_EMMC_RST 20
+#define AN7583_SOE_RST 21
+#define AN7583_XFP_MAC_RST 22
+#define AN7583_MDIO0 23
+#define AN7583_MDIO1 24
+/* RST_CTRL1 */
+#define AN7583_PCM1_ZSI_ISI_RST 25
+#define AN7583_FE_PDMA_RST 26
+#define AN7583_FE_QDMA_RST 27
+#define AN7583_PCM_SPIWP_RST 28
+#define AN7583_CRYPTO_RST 29
+#define AN7583_TIMER_RST 30
+#define AN7583_PCM1_RST 31
+#define AN7583_UART_RST 32
+#define AN7583_GPIO_RST 33
+#define AN7583_GDMA_RST 34
+#define AN7583_I2C_MASTER_RST 35
+#define AN7583_PCM2_ZSI_ISI_RST 36
+#define AN7583_SFC_RST 37
+#define AN7583_UART2_RST 38
+#define AN7583_GDMP_RST 39
+#define AN7583_FE_RST 40
+#define AN7583_USB_HOST_P0_RST 41
+#define AN7583_GSW_RST 42
+#define AN7583_SFC2_PCM_RST 43
+#define AN7583_PCIE0_RST 44
+#define AN7583_PCIE1_RST 45
+#define AN7583_CPU_TIMER_RST 46
+#define AN7583_PCIE_HB_RST 47
+#define AN7583_XPON_MAC_RST 48
+
+#endif /* __DT_BINDINGS_RESET_CONTROLLER_AIROHA_AN7583_H_ */