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d62ecd6c07
Refresh patches 6.12 for airoha and econet Fixes:122135b964("airoha: an7581: add support for kernel 6.12") Fixes:73d0f92460("kernel: Add new platform EcoNet MIPS") Signed-off-by: Leo Barsky <leobrsky@proton.me> Link: https://github.com/openwrt/openwrt/pull/20073 Signed-off-by: Robert Marko <robimarko@gmail.com>
87 lines
3.2 KiB
Diff
87 lines
3.2 KiB
Diff
From e4c7dfd953f7618f0ccb70d87c1629634f306fab Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Wed, 8 Jan 2025 10:50:41 +0100
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Subject: [PATCH 2/6] PCI: mediatek-gen3: Move reset/assert callbacks in
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.power_up()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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In order to make the code more readable, the reset_control_bulk_assert()
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function for PHY reset lines is moved to make it pair with
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reset_control_bulk_deassert() in mtk_pcie_power_up() and
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mtk_pcie_en7581_power_up(). The same change is done for
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reset_control_assert() used to assert MAC reset line.
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Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
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complete PCIe reset on MediaTek controller.
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Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b@kernel.org
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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---
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drivers/pci/controller/pcie-mediatek-gen3.c | 28 +++++++++++++--------
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1 file changed, 18 insertions(+), 10 deletions(-)
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--- a/drivers/pci/controller/pcie-mediatek-gen3.c
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+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
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@@ -120,6 +120,8 @@
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#define MAX_NUM_PHY_RESETS 3
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+#define PCIE_MTK_RESET_TIME_US 10
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+
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/* Time in ms needed to complete PCIe reset on EN7581 SoC */
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#define PCIE_EN7581_RESET_TIME_MS 100
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@@ -868,9 +870,14 @@ static int mtk_pcie_en7581_power_up(stru
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u32 val;
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/*
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- * Wait for the time needed to complete the bulk assert in
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- * mtk_pcie_setup for EN7581 SoC.
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+ * The controller may have been left out of reset by the bootloader
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+ * so make sure that we get a clean start by asserting resets here.
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*/
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+ reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
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+ pcie->phy_resets);
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+ reset_control_assert(pcie->mac_reset);
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+
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+ /* Wait for the time needed to complete the reset lines assert. */
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mdelay(PCIE_EN7581_RESET_TIME_MS);
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err = phy_init(pcie->phy);
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@@ -937,6 +944,15 @@ static int mtk_pcie_power_up(struct mtk_
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struct device *dev = pcie->dev;
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int err;
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+ /*
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+ * The controller may have been left out of reset by the bootloader
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+ * so make sure that we get a clean start by asserting resets here.
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+ */
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+ reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
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+ pcie->phy_resets);
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+ reset_control_assert(pcie->mac_reset);
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+ usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
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+
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/* PHY power on and enable pipe clock */
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err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
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if (err) {
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@@ -1009,14 +1025,6 @@ static int mtk_pcie_setup(struct mtk_gen
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* counter since the bulk is shared.
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*/
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reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
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- /*
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- * The controller may have been left out of reset by the bootloader
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- * so make sure that we get a clean start by asserting resets here.
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- */
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- reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
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-
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- reset_control_assert(pcie->mac_reset);
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- usleep_range(10, 20);
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/* Don't touch the hardware registers before power up */
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err = pcie->soc->power_up(pcie);
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