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d62ecd6c07
Refresh patches 6.12 for airoha and econet Fixes:122135b964("airoha: an7581: add support for kernel 6.12") Fixes:73d0f92460("kernel: Add new platform EcoNet MIPS") Signed-off-by: Leo Barsky <leobrsky@proton.me> Link: https://github.com/openwrt/openwrt/pull/20073 Signed-off-by: Robert Marko <robimarko@gmail.com>
233 lines
6.8 KiB
Diff
233 lines
6.8 KiB
Diff
From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 9 Jan 2025 14:12:58 +0100
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Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
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Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
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frequency scaling with SMC APIs and register a generic "cpufreq-dt"
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device.
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All CPU share the same frequency and can't be controlled independently.
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CPU frequency is controlled by the attached PM domain.
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Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
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driver is needed with OPP v2 nodes declared in DTS.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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drivers/cpufreq/Kconfig.arm | 8 ++
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drivers/cpufreq/Makefile | 1 +
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drivers/cpufreq/airoha-cpufreq.c | 152 +++++++++++++++++++++++++++
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drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
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4 files changed, 163 insertions(+)
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create mode 100644 drivers/cpufreq/airoha-cpufreq.c
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--- a/drivers/cpufreq/Kconfig.arm
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+++ b/drivers/cpufreq/Kconfig.arm
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@@ -15,6 +15,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
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To compile this driver as a module, choose M here: the
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module will be called sun50i-cpufreq-nvmem.
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+config ARM_AIROHA_SOC_CPUFREQ
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+ tristate "Airoha EN7581 SoC CPUFreq support"
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+ depends on ARCH_AIROHA || COMPILE_TEST
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+ select PM_OPP
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+ default ARCH_AIROHA
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+ help
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+ This adds the CPUFreq driver for Airoha EN7581 SoCs.
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+
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config ARM_APPLE_SOC_CPUFREQ
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tristate "Apple Silicon SoC CPUFreq support"
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depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
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--- a/drivers/cpufreq/Makefile
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+++ b/drivers/cpufreq/Makefile
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@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY) +
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##################################################################################
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# ARM SoC drivers
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+obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ) += airoha-cpufreq.o
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obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ) += apple-soc-cpufreq.o
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obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ) += armada-37xx-cpufreq.o
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obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ) += armada-8k-cpufreq.o
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--- /dev/null
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+++ b/drivers/cpufreq/airoha-cpufreq.c
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@@ -0,0 +1,166 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+#include <linux/bitfield.h>
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+#include <linux/cpufreq.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/pm_runtime.h>
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+#include <linux/slab.h>
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+
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+#include "cpufreq-dt.h"
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+
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+struct airoha_cpufreq_priv {
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+ int opp_token;
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+ struct device **virt_devs;
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+ struct platform_device *cpufreq_dt;
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+};
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+
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+static struct platform_device *cpufreq_pdev;
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+
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+/* NOP function to disable OPP from setting clock */
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+static int airoha_cpufreq_config_clks_nop(struct device *dev,
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+ struct opp_table *opp_table,
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+ struct dev_pm_opp *old_opp,
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+ struct dev_pm_opp *opp,
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+ void *data, bool scaling_down)
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+{
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+ return 0;
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+}
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+
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+static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
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+static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
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+
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+static int airoha_cpufreq_probe(struct platform_device *pdev)
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+{
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+ struct dev_pm_opp_config config = {
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+ .clk_names = airoha_cpufreq_clk_names,
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+ .config_clks = airoha_cpufreq_config_clks_nop,
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+ .genpd_names = airoha_cpufreq_pd_names,
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+ };
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+ struct platform_device *cpufreq_dt;
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+ struct airoha_cpufreq_priv *priv;
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+ struct device *dev = &pdev->dev;
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+ struct device **virt_devs = NULL;
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+ struct device *cpu_dev;
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+ int ret;
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+
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+ /* CPUs refer to the same OPP table */
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+ cpu_dev = get_cpu_device(0);
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+ if (!cpu_dev)
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+ return -ENODEV;
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+
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+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ /* Set OPP table conf with NOP config_clks */
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+ priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
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+ if (priv->opp_token < 0)
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+ return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
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+
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+ /* Set Attached PM for OPP ACTIVE */
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+ if (virt_devs) {
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+ const char * const *name = airoha_cpufreq_pd_names;
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+ int i, j;
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+
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+ for (i = 0; *name; i++, name++) {
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+ ret = pm_runtime_resume_and_get(virt_devs[i]);
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+ if (ret) {
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+ dev_err(cpu_dev, "failed to resume %s: %d\n",
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+ *name, ret);
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+
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+ /* Rollback previous PM runtime calls */
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+ name = config.genpd_names;
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+ for (j = 0; *name && j < i; j++, name++)
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+ pm_runtime_put(virt_devs[j]);
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+
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+ goto err_register_cpufreq;
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+ }
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+ }
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+ priv->virt_devs = virt_devs;
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+ }
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+
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+ cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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+ ret = PTR_ERR_OR_ZERO(cpufreq_dt);
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+ if (ret) {
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+ dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret);
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+ goto err_register_cpufreq;
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+ }
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+
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+ priv->cpufreq_dt = cpufreq_dt;
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+ platform_set_drvdata(pdev, priv);
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+
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+ return 0;
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+
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+err_register_cpufreq:
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+ dev_pm_opp_clear_config(priv->opp_token);
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+
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+ return ret;
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+}
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+
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+static void airoha_cpufreq_remove(struct platform_device *pdev)
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+{
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+ struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
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+ const char * const *name = airoha_cpufreq_pd_names;
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+ int i;
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+
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+ platform_device_unregister(priv->cpufreq_dt);
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+
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+ dev_pm_opp_clear_config(priv->opp_token);
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+
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+ for (i = 0; *name; i++, name++)
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+ pm_runtime_put(priv->virt_devs[i]);
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+}
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+
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+static struct platform_driver airoha_cpufreq_driver = {
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+ .probe = airoha_cpufreq_probe,
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+ .remove_new = airoha_cpufreq_remove,
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+ .driver = {
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+ .name = "airoha-cpufreq",
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+ },
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+};
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+
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+static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
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+ { .compatible = "airoha,en7581" },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
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+
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+static int __init airoha_cpufreq_init(void)
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+{
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+ struct device_node *np = of_find_node_by_path("/");
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+ const struct of_device_id *match;
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+ int ret;
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+
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+ if (!np)
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+ return -ENODEV;
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+
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+ match = of_match_node(airoha_cpufreq_match_list, np);
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+ of_node_put(np);
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+ if (!match)
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+ return -ENODEV;
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+
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+ ret = platform_driver_register(&airoha_cpufreq_driver);
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+ if (unlikely(ret < 0))
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+ return ret;
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+
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+ cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq",
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+ -1, match, sizeof(*match));
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+ ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
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+ if (ret)
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+ platform_driver_unregister(&airoha_cpufreq_driver);
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+
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+ return ret;
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+}
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+module_init(airoha_cpufreq_init);
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+
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+static void __exit airoha_cpufreq_exit(void)
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+{
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+ platform_device_unregister(cpufreq_pdev);
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+ platform_driver_unregister(&airoha_cpufreq_driver);
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+}
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+module_exit(airoha_cpufreq_exit);
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+
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+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
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+MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
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+MODULE_LICENSE("GPL");
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--- a/drivers/cpufreq/cpufreq-dt-platdev.c
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+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
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@@ -103,6 +103,8 @@ static const struct of_device_id allowli
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* platforms using "operating-points-v2" property.
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*/
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static const struct of_device_id blocklist[] __initconst = {
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+ { .compatible = "airoha,en7581", },
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+
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{ .compatible = "allwinner,sun50i-h6", },
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{ .compatible = "allwinner,sun50i-h616", },
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{ .compatible = "allwinner,sun50i-h618", },
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