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	This patch series greatly improve airoha snfi driver and fix a number of serious bugs. Fixed bugs: * Fix reading/writing of flashes with more than one plane per lun * Fill the buffer with 0xff before writing * Fix reading of flashes supporting continuous reading mode * Fix error paths Improvements: * Add support of dual/quad wires spi modes in exec_op(). This also fix flash reading/writing if dirmap can't be created. * Support of dualio/quadio flash reading commands Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Link: https://github.com/openwrt/openwrt/pull/20295 Signed-off-by: Robert Marko <robimarko@gmail.com>
		
			
				
	
	
		
			136 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			136 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 995b1a65206ee28d5403db0518cb230f2ce429ef Mon Sep 17 00:00:00 2001
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| From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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| Date: Mon, 11 Aug 2025 19:57:43 +0300
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| Subject: [PATCH v6 07/13] spi: airoha: unify dirmap read/write code
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| 
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| Makes dirmap writing looks similar to dirmap reading. Just a minor
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| refactoring, no behavior change is expected.
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| 
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| Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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| ---
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|  drivers/spi/spi-airoha-snfi.c | 50 ++++++++++++++++++++++-------------
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|  1 file changed, 32 insertions(+), 18 deletions(-)
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| 
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| --- a/drivers/spi/spi-airoha-snfi.c
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| +++ b/drivers/spi/spi-airoha-snfi.c
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| @@ -672,6 +672,8 @@ static ssize_t airoha_snand_dirmap_read(
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|  	u32 val, rd_mode;
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|  	int err;
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|  
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| +	as_ctrl = spi_controller_get_devdata(spi->controller);
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| +
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|  	switch (op->cmd.opcode) {
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|  	case SPI_NAND_OP_READ_FROM_CACHE_DUAL:
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|  		rd_mode = 1;
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| @@ -684,7 +686,6 @@ static ssize_t airoha_snand_dirmap_read(
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|  		break;
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|  	}
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|  
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| -	as_ctrl = spi_controller_get_devdata(spi->controller);
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|  	err = airoha_snand_set_mode(as_ctrl, SPI_MODE_DMA);
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|  	if (err < 0)
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|  		return err;
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| @@ -748,7 +749,7 @@ static ssize_t airoha_snand_dirmap_read(
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|  	if (err)
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|  		goto error_dma_unmap;
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|  
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| -	/* trigger dma start read */
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| +	/* trigger dma reading */
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|  	err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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|  				SPI_NFI_RD_TRIG);
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|  	if (err)
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| @@ -806,37 +807,47 @@ error_dma_mode_off:
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|  static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
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|  					 u64 offs, size_t len, const void *buf)
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|  {
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| -	struct spi_mem_op *op = &desc->info.op_tmpl;
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|  	struct spi_device *spi = desc->mem->spi;
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|  	u8 *txrx_buf = spi_get_ctldata(spi);
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|  	struct airoha_snand_ctrl *as_ctrl;
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|  	dma_addr_t dma_addr;
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| -	u32 wr_mode, val;
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| +	u32 wr_mode, val, opcode;
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|  	int err;
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|  
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|  	as_ctrl = spi_controller_get_devdata(spi->controller);
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|  
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| +	opcode = desc->info.op_tmpl.cmd.opcode;
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| +	switch (opcode) {
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| +	case SPI_NAND_OP_PROGRAM_LOAD_SINGLE:
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| +	case SPI_NAND_OP_PROGRAM_LOAD_RAMDOM_SINGLE:
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| +		wr_mode = 0;
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| +		break;
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| +	case SPI_NAND_OP_PROGRAM_LOAD_QUAD:
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| +	case SPI_NAND_OP_PROGRAM_LOAD_RAMDON_QUAD:
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| +		wr_mode = 2;
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| +		break;
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| +	default:
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| +		/* unknown opcode */
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| +		return -EOPNOTSUPP;
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| +	}
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| +
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|  	memcpy(txrx_buf + offs, buf, len);
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| -	dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE,
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| -				  DMA_TO_DEVICE);
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| -	err = dma_mapping_error(as_ctrl->dev, dma_addr);
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| -	if (err)
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| -		return err;
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|  
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|  	err = airoha_snand_set_mode(as_ctrl, SPI_MODE_DMA);
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|  	if (err < 0)
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| -		goto error_dma_unmap;
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| +		return err;
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|  
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|  	err = airoha_snand_nfi_config(as_ctrl);
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|  	if (err)
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| -		goto error_dma_unmap;
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| +		goto error_dma_mode_off;
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|  
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| -	if (op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_QUAD ||
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| -	    op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_RAMDON_QUAD)
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| -		wr_mode = BIT(1);
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| -	else
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| -		wr_mode = 0;
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| +	dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE,
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| +				  DMA_TO_DEVICE);
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| +	err = dma_mapping_error(as_ctrl->dev, dma_addr);
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| +	if (err)
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| +		goto error_dma_mode_off;
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|  
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| +	/* set dma addr */
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|  	err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR,
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|  			   dma_addr);
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|  	if (err)
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| @@ -850,12 +861,13 @@ static ssize_t airoha_snand_dirmap_write
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|  	if (err)
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|  		goto error_dma_unmap;
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|  
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| +	/* set write command */
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|  	err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL1,
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| -			   FIELD_PREP(SPI_NFI_PG_LOAD_CMD,
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| -				      op->cmd.opcode));
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| +			   FIELD_PREP(SPI_NFI_PG_LOAD_CMD, opcode));
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|  	if (err)
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|  		goto error_dma_unmap;
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|  
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| +	/* set write mode */
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|  	err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL,
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|  			   FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, wr_mode));
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|  	if (err)
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| @@ -887,6 +899,7 @@ static ssize_t airoha_snand_dirmap_write
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|  	if (err)
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|  		goto error_dma_unmap;
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|  
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| +	/* trigger dma writing */
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|  	err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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|  				SPI_NFI_WR_TRIG);
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|  	if (err)
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| @@ -931,6 +944,7 @@ static ssize_t airoha_snand_dirmap_write
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|  error_dma_unmap:
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|  	dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE,
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|  			 DMA_TO_DEVICE);
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| +error_dma_mode_off:
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|  	airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL);
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|  	return err;
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|  }
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