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39ae0f972d
This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me> Link: https://github.com/openwrt/openwrt/pull/19038 Signed-off-by: Robert Marko <robimarko@gmail.com>
41 lines
1.5 KiB
Diff
41 lines
1.5 KiB
Diff
From 8e38e08f2c560328a873c35aff1a0dbea6a7d084 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Tue, 1 Oct 2024 12:10:25 +0200
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Subject: [PATCH 2/2] net: airoha: fix PSE memory configuration in
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airoha_fe_pse_ports_init()
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Align PSE memory configuration to vendor SDK. In particular, increase
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initial value of PSE reserved memory in airoha_fe_pse_ports_init()
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routine by the value used for the second Packet Processor Engine (PPE2)
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and do not overwrite the default value.
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Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet support
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for EN7581 SoC")
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://patch.msgid.link/20241001-airoha-eth-pse-fix-v2-2-9a56cdffd074@kernel.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/airoha_eth.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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--- a/drivers/net/ethernet/mediatek/airoha_eth.c
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+++ b/drivers/net/ethernet/mediatek/airoha_eth.c
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@@ -1166,11 +1166,13 @@ static void airoha_fe_pse_ports_init(str
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[FE_PSE_PORT_GDM4] = 2,
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[FE_PSE_PORT_CDM5] = 2,
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};
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+ u32 all_rsv;
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int q;
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+ all_rsv = airoha_fe_get_pse_all_rsv(eth);
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/* hw misses PPE2 oq rsv */
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- airoha_fe_set(eth, REG_FE_PSE_BUF_SET,
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- PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]);
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+ all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2];
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+ airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);
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/* CMD1 */
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for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
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