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openwrt/package/kernel/mac80211/patches/ath11k/925-wifi-ath11k-add-QCN6122-device-support.patch
Mieczyslaw Nalewaj 88f4c32060 mac80211: update to version 6.14.11
Update to version 6.14.11

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-07-05 14:43:08 +02:00

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1.9 KiB
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From: George Moussalem <george.moussalem@outlook.com>
Date: Wed, 27 Oct 2024 16:34:11 +0400
Subject: [PATCH] wifi: ath11k: add QCN6122 device support
QCN6122 is a 2x2 11AX PCIe based chipset, but it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, hence it is enumerated
by the Q6 processor. It is registered to the APSS processor
(Application Processor SubSystem) as a platform device (AHB) and remoteproc
APIs are used to boot up or shutdown the device like other AHB devices.
Also, device information like BAR and its size is not known to the
APSS processor as the chip is enumerated by WPSS Q6. These details
are fetched over QMI.
STA, AP, and MESH modes are supported.
Tested on: Linksys MX2000 and GLiNET B3000 access points for prolonged duration
tests spanning multiple days with multiple clients connected with firmware
WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
An important point to note is that though QCN6122 is a PCIe device,
it is an IPQ5018 SoC specific solution and cannot be attached to any other
platform.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -37,6 +37,9 @@ static const struct of_device_id ath11k_
{ .compatible = "qcom,ipq5018-wifi",
.data = (void *)ATH11K_HW_IPQ5018_HW10,
},
+ { .compatible = "qcom,qcn6122-wifi",
+ .data = (void *)ATH11K_HW_QCN6122_HW10,
+ },
{ }
};
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -137,6 +137,15 @@ static const struct ath11k_msi_config at
},
.hw_rev = ATH11K_HW_QCA6698AQ_HW21,
},
+ {
+ .total_vectors = 13,
+ .total_users = 2,
+ .users = (struct ath11k_msi_user[]) {
+ { .name = "CE", .num_vectors = 5, .base_vector = 0 },
+ { .name = "DP", .num_vectors = 8, .base_vector = 5 },
+ },
+ .hw_rev = ATH11K_HW_QCN6122_HW10,
+ },
};
int ath11k_pcic_init_msi_config(struct ath11k_base *ab)