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openwrt/package/boot/uboot-sifiveu/patches/0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch
Zoltan HERPAI e60729c720 uboot-sifiveu: bump to 2023.10
Upgrade the u-boot to a more recent version, and drop and refresh
patches while at it. Additionally, use the correct architecture
when running mkimage.

Runtime-tested:
 - SiFive Unleashed
 - SiFive Unmatched

Dropped:
0009-riscv-Fix-build-against-binutils.patch

Added:
0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
2025-02-18 22:40:26 +01:00

23 lines
722 B
Diff

From 45f9941ddc6346b38aa9eb7f033e1e169b63bdc7 Mon Sep 17 00:00:00 2001
From: Thomas Perrot <thomas.perrot@bootlin.com>
Date: Fri, 8 Dec 2023 11:24:37 +0100
Subject: [PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to
1600MT/s
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
---
arch/riscv/dts/fu740-c000-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
@@ -77,7 +77,7 @@
0x0 0x100b2000 0x0 0x2000
0x0 0x100b8000 0x0 0x1000>;
clocks = <&prci FU740_PRCI_CLK_DDRPLL>;
- clock-frequency = <933333324>;
+ clock-frequency = <800000004>;
bootph-pre-ram;
};
};