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https://git.openwrt.org/openwrt/openwrt.git
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d41d9befb9
Add u-boot bootloader based on 2023.01 to support D1-based boards, currently: - Dongshan Nezha STU - LicheePi RV Dock - MangoPi MQ-Pro - Nezha D1 Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
121 lines
4.2 KiB
Diff
121 lines
4.2 KiB
Diff
From 7be2405244565973cff0a40196bbed08df90f6a3 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Mon, 16 May 2022 00:31:36 -0500
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Subject: [PATCH 28/90] pinctrl: sunxi: Add NAND pinmuxes
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NAND is always at function 2 on port C.
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Pin lists and mux values were taken from the Linux drivers.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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@@ -269,6 +269,7 @@ static const struct sunxi_pinctrl_functi
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#endif
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{ "mmc2", 3 }, /* PC6-PC15 */
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{ "mmc3", 2 }, /* PI4-PI9 */
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+ { "nand0", 2 }, /* PC0-PC24 */
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{ "spi0", 3 }, /* PC0-PC2, PC23 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 4 }, /* PF2-PF4 */
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@@ -293,6 +294,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG3-PG8 */
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{ "mmc2", 3 }, /* PC6-PC15 */
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+ { "nand0", 2 }, /* PC0-PC19 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 4 }, /* PF2-PF4 */
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@@ -319,6 +321,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC6-PC15, PC24 */
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{ "mmc3", 4 }, /* PC6-PC15, PC24 */
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+ { "nand0", 2 }, /* PC0-PC26 */
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{ "spi0", 3 }, /* PC0-PC2, PC27 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -363,6 +366,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc1", 4 }, /* PG0-PG5 */
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#endif
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{ "mmc2", 3 }, /* PC5-PC15, PC24 */
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+ { "nand0", 2 }, /* PC0-PC24 */
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{ "spi0", 3 }, /* PC0-PC2, PC23 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 4 }, /* PF2-PF4 */
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@@ -386,6 +390,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC5-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -424,6 +429,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC5-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -450,6 +456,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC5-PC16 */
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+ { "nand0", 2 }, /* PC0-PC18 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -491,6 +498,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC5-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -557,6 +565,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC6-PC16 */
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+ { "nand0", 2 }, /* PC0-PC18 */
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{ "spi0", 3 }, /* PC0-PC2, PC19 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 4 }, /* PF2-PF4 */
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@@ -622,6 +631,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC1-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "pwm", 2 }, /* PD22 */
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{ "spi0", 4 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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@@ -664,6 +674,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC1-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 3 }, /* PC0-PC3 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -690,6 +701,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC1-PC14 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 4 }, /* PC0-PC7 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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@@ -728,6 +740,7 @@ static const struct sunxi_pinctrl_functi
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{ "mmc0", 2 }, /* PF0-PF5 */
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{ "mmc1", 2 }, /* PG0-PG5 */
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{ "mmc2", 3 }, /* PC0-PC16 */
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+ { "nand0", 2 }, /* PC0-PC16 */
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{ "spi0", 4 }, /* PC0-PC7, PC15-PC16 */
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#if IS_ENABLED(CONFIG_UART0_PORT_F)
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{ "uart0", 3 }, /* PF2-PF4 */
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