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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-11-21 20:46:14 +00:00
openwrt/include/site/loongarch64
Weijie Gao 7fcb82665e loongarch64: new target
Add target for Loongson LoongArch64-based boards.

LoongArch is a new RISC ISA developed by Loongson. It's a bit like
MIPS or RISC-V. LoongArch includes both 32-bit and 64-bit versions
(LoongArch32/LoongArch64).

Loongson 3A5000 and 3A6000 are the two existing CPUs of LoongArch64
and is used for PC products. It's BIOS supports ACPI and UEFI-only
boot. These CPUs supports SMP and SMT.

At present only LoongArch64 is supported by linux kernel.

Toolchain requirement:
binutils >= 2.40
gcc >= 13.1

For details, please check the following links:
https://lwn.net/Articles/861951/
https://loongson.github.io/LoongArch-Documentation/README-EN.html

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
2024-05-04 14:14:16 +08:00

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#!/bin/sh
. $TOPDIR/include/site/linux
ac_cv_c_littleendian=${ac_cv_c_littleendian=yes}
ac_cv_c_bigendian=${ac_cv_c_bigendian=no}
ac_cv_sizeof___int64=0
ac_cv_sizeof_char=1
ac_cv_sizeof_int=4
ac_cv_sizeof_int16_t=2
ac_cv_sizeof_int32_t=4
ac_cv_sizeof_int64_t=8
ac_cv_sizeof_long_int=8
ac_cv_sizeof_long_long=8
ac_cv_sizeof_long=8
ac_cv_sizeof_off_t=8
ac_cv_sizeof_short_int=2
ac_cv_sizeof_short=2
ac_cv_sizeof_size_t=8
ac_cv_sizeof_ssize_t=8
ac_cv_sizeof_u_int16_t=2
ac_cv_sizeof_u_int32_t=4
ac_cv_sizeof_u_int64_t=8
ac_cv_sizeof_uint16_t=2
ac_cv_sizeof_uint32_t=4
ac_cv_sizeof_uint64_t=8
ac_cv_sizeof_unsigned_int=4
ac_cv_sizeof_unsigned_long=8
ac_cv_sizeof_unsigned_long_long=8
ac_cv_sizeof_unsigned_short=2
ac_cv_sizeof_void_p=8