mirror of
https://git.code.sf.net/p/openocd/code
synced 2025-09-29 00:23:54 +00:00
ff550ed0b0
When attempting to write to internal flash the flashing step fails with 'Error: timeout waiting for algorithm, a target reset is recommended'. Updated flashing algorithm for MAX32xxx to fix this. Change-Id: I51350c1320c9699ddcf6cb28d9299538bece4c4f Signed-off-by: Henrik Mau <henrik.mau@analog.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8794 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: zapb <dev@zapb.de>
283 lines
7.9 KiB
C
283 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/***************************************************************************
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* Copyright (C) 2015 by Maxim Integrated *
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* Copyright (C) 2025 Analog Devices, Inc. *
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***************************************************************************/
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/***** Includes *****/
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#ifdef ALGO_TEST
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#include "mxc_device.h"
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#endif
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#include "tpu_regs.h"
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#include "gcr_regs.h"
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#include "flc_regs.h"
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#include "algo_options.h"
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#ifdef ALGO_TEST
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#include <stdio.h>
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#else
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#define printf(...)
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#endif
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/***** Definitions *****/
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#define MXC_BASE_TPU ((uint32_t)0x40001000UL)
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#define MXC_TPU ((struct mxc_tpu_regs *)MXC_BASE_TPU)
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#define MXC_BASE_GCR ((uint32_t)0x40000000UL)
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#define MXC_GCR ((struct mxc_gcr_regs *)MXC_BASE_GCR)
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/******************************************************************************/
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#define getbyte(temp8) \
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/* Wait for the Read FIFO to not equal the Write FIFO */ \
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do { while (*read_ptr == *write_ptr); \
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temp8 = **read_ptr; \
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/* Increment and wrap around the read pointer */ \
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if ((*read_ptr + 1) >= (uint8_t *)(work_end - 8 - 256)) { \
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*read_ptr = (uint8_t *)(work_start + 8); \
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} else { \
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(*read_ptr)++; \
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} \
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len--; \
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addr++; } while (0)
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/******************************************************************************/
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#ifndef ALGO_TEST
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__attribute__ ((naked, section(".algo")))
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#endif
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void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t addr)
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{
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printf(" > %s starting\n", __func__);
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volatile uint8_t * (*write_ptr) = (volatile uint8_t **)work_start;
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volatile uint8_t * (*read_ptr) = (volatile uint8_t **)(work_start + 4);
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uint32_t *flc_base = (uint32_t *)(work_end - 4 - 128);
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uint32_t *options = (uint32_t *)(work_end - 8 - 128);
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uint32_t *enc_buffer = (uint32_t *)(work_end - 8 - 256);
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uint8_t temp8;
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uint32_t addr_save;
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int i;
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struct mxc_flc_regs *MXC_FLC = (struct mxc_flc_regs *)*flc_base;
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printf(" > w%08x r%08x o%08x f%08x b%08x b%08x\n",
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(uint32_t)write_ptr, (uint32_t)read_ptr, (uint32_t)*options, (uint32_t)*flc_base,
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(uint32_t)enc_buffer, (uint32_t)(enc_buffer + 256));
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if (*options & OPTIONS_ENC) {
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/* Enable Memory Protection */
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MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_EN;
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/* Set the keysize */
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if (*options & OPTIONS_KEYSIZE)
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MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_KEYSZ;
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else
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MXC_GCR->scon &= ~(MXC_F_GCR_SCON_MEMPROT_KEYSZ);
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} else {
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/* Disable memory protection */
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MXC_GCR->scon &= ~MXC_F_GCR_SCON_MEMPROT_EN;
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}
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if (*options & OPTIONS_ENC) {
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/* Setup the AES */
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/* Enable CRYPTO clock */
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if ((MXC_GCR->clkcn & MXC_F_GCR_CLKCN_HIRC_EN) == 0)
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MXC_GCR->clkcn |= MXC_F_GCR_CLKCN_HIRC_EN;
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/* Disable CRYPTO clock gate */
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if (MXC_GCR->perckcn0 & MXC_F_GCR_PERCKCN0_CRYPTOD)
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MXC_GCR->perckcn0 &= ~(MXC_F_GCR_PERCKCN0_CRYPTOD);
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/* Reset Crypto block and clear state */
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MXC_TPU->ctrl = MXC_F_TPU_CTRL_RST;
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/* Set the legacy bit */
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MXC_TPU->ctrl |= MXC_F_TPU_CTRL_FLAG_MODE;
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/* Byte swap the input and output */
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MXC_TPU->ctrl |= MXC_F_TPU_CTRL_BSO;
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MXC_TPU->ctrl |= MXC_F_TPU_CTRL_BSI;
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}
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while (len) {
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if ((*options & OPTIONS_128) == 0) {
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/* Save the current address before we read from the working area */
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addr_save = addr;
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/* 32-bit write */
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MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
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enc_buffer[0] = 0;
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for (i = 0; i < 4; i++) {
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/* Get data from the working area, pad with 0xFF */
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if (len) {
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getbyte(temp8);
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__asm("nop\n");
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} else {
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temp8 = 0xFF;
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__asm("nop\n");
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}
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enc_buffer[0] |= (temp8 << (i * 8));
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}
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/* 32-bit write */
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MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
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MXC_FLC->addr = addr_save;
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MXC_FLC->data[0] = enc_buffer[0];
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/* Enable the write */
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait for the operation to complete */
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do {} while (MXC_FLC->cn & MXC_F_FLC_CN_WR);
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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#ifndef ALGO_TEST
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#ifdef __riscv
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__asm("ebreak\n");
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#else
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__asm("bkpt\n");
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#endif
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#else
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printf(" > Error writing to flash\n");
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return;
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#endif
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}
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} else {
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/* Save the current address before we read from the working area */
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addr_save = addr;
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/* Fill the buffer with the plain text data from the working area */
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for (i = 0; i < 4; i++) {
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/* Get data from the working area, pad with 0xFF */
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enc_buffer[i] = 0;
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if (len) {
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getbyte(temp8);
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__asm("nop\n");
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} else {
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temp8 = 0xFF;
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__asm("nop\n");
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}
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enc_buffer[i] |= (temp8 << (0));
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/* Get data from the working area, pad with 0xFF */
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if (len) {
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getbyte(temp8);
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__asm("nop\n");
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} else {
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temp8 = 0xFF;
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__asm("nop\n");
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}
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enc_buffer[i] |= (temp8 << (8));
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/* Get data from the working area, pad with 0xFF */
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if (len) {
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getbyte(temp8);
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__asm("nop\n");
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} else {
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temp8 = 0xFF;
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__asm("nop\n");
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}
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enc_buffer[i] |= (temp8 << (16));
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/* Get data from the working area, pad with 0xFF */
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if (len) {
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getbyte(temp8);
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__asm("nop\n");
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} else {
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temp8 = 0xFF;
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__asm("nop\n");
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}
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enc_buffer[i] |= (temp8 << (24));
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}
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if (*options & OPTIONS_ENC) {
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/* XOR data with the address */
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for (i = 0; i < 4; i++) {
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if (*options & OPTIONS_RELATIVE_XOR)
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enc_buffer[i] ^= ((addr_save & 0x00FFFFFF) + i * 4);
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else
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enc_buffer[i] ^= (addr_save + i * 4);
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}
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/* Encrypt the plain text
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* Clear interrupt flags*/
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MXC_TPU->ctrl |= MXC_F_TPU_CTRL_CPH_DONE;
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MXC_TPU->cipher_ctrl = ((0x0 << MXC_F_TPU_CIPHER_CTRL_MODE_POS) |
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(0x0 << MXC_F_TPU_CIPHER_CTRL_ENC_POS));
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if (*options & OPTIONS_KEYSIZE) {
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/* ECB, AES-256, encrypt */
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MXC_TPU->cipher_ctrl |=
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(0x3 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS);
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} else {
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/* ECB, AES-128, encrypt */
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MXC_TPU->cipher_ctrl |=
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(0x1 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS);
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}
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/* Set the key source */
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MXC_TPU->cipher_ctrl =
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((MXC_TPU->cipher_ctrl & ~MXC_F_TPU_CIPHER_CTRL_SRC) |
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(0x3 << MXC_F_TPU_CIPHER_CTRL_SRC_POS));
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/* Copy data to start the operation */
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MXC_TPU->din[0] = enc_buffer[0];
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MXC_TPU->din[1] = enc_buffer[1];
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MXC_TPU->din[2] = enc_buffer[2];
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MXC_TPU->din[3] = enc_buffer[3];
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/* Wait until operation is complete */
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do {} while (!(MXC_TPU->ctrl & MXC_F_TPU_CTRL_CPH_DONE));
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/* Copy the data out */
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enc_buffer[0] = MXC_TPU->dout[0];
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enc_buffer[1] = MXC_TPU->dout[1];
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enc_buffer[2] = MXC_TPU->dout[2];
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enc_buffer[3] = MXC_TPU->dout[3];
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}
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/* 128-bit write */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_WDTH;
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MXC_FLC->addr = addr_save;
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MXC_FLC->data[0] = enc_buffer[0];
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MXC_FLC->data[1] = enc_buffer[1];
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MXC_FLC->data[2] = enc_buffer[2];
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MXC_FLC->data[3] = enc_buffer[3];
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/* Enable the write */
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait for the operation to complete */
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do {} while (MXC_FLC->cn & MXC_F_FLC_CN_WR);
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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#ifndef ALGO_TEST
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#ifdef __riscv
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__asm("ebreak\n");
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#else
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__asm("bkpt\n");
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#endif
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printf(" > Error writing to flash\n");
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return;
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#endif
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}
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}
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}
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#ifndef ALGO_TEST
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#ifdef __riscv
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__asm("ebreak\n");
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#else
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__asm("bkpt\n");
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#endif
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#else
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printf(" > %s returning\n", __func__);
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return;
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#endif
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}
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