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https://git.code.sf.net/p/openocd/code
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382148e4dd
With the old checkpatch we cannot use the correct format for the SPDX tags in the file .c, in fact the C99 comments are not allowed and we had to use the block comment. With the new checkpatch, let's switch to the correct SPDX format. Change created automatically through the command: sed -i \ 's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \ $(find src/ contrib/ -name \*.c) Change-Id: I6da16506baa7af718947562505dd49606d124171 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7153 Tested-by: jenkins
145 lines
3.3 KiB
C
145 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/***************************************************************************
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* Copyright (C) 2008 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* Copyright (C) 2008 by Frederik Kriewtz *
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* frederik@kriewitz.eu *
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***************************************************************************/
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#include "dcc_stdio.h"
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#define TARGET_REQ_TRACEMSG 0x00
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#define TARGET_REQ_DEBUGMSG_ASCII 0x01
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#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8))
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#define TARGET_REQ_DEBUGCHAR 0x02
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
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/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
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* DCRDR[7:0] is used by target for status
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* DCRDR[15:8] is used by target for write buffer
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* DCRDR[23:16] is used for by host for status
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* DCRDR[31:24] is used for by host for write buffer */
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#define NVIC_DBG_DATA_R (*((volatile unsigned short *)0xE000EDF8))
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#define BUSY 1
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void dbg_write(unsigned long dcc_data)
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{
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int len = 4;
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while (len--)
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{
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/* wait for data ready */
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while (NVIC_DBG_DATA_R & BUSY);
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/* write our data and set write flag - tell host there is data*/
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NVIC_DBG_DATA_R = (unsigned short)(((dcc_data & 0xff) << 8) | BUSY);
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dcc_data >>= 8;
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}
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}
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#elif defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5T__)
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void dbg_write(unsigned long dcc_data)
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{
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unsigned long dcc_status;
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do {
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asm volatile("mrc p14, 0, %0, c0, c0" : "=r" (dcc_status));
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} while (dcc_status & 0x2);
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asm volatile("mcr p14, 0, %0, c1, c0" : : "r" (dcc_data));
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}
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#else
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#error unsupported target
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#endif
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void dbg_trace_point(unsigned long number)
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{
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dbg_write(TARGET_REQ_TRACEMSG | (number << 8));
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}
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void dbg_write_u32(const unsigned long *val, long len)
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{
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dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(4) | ((len & 0xffff) << 16));
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while (len > 0)
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{
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dbg_write(*val);
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val++;
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len--;
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}
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}
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void dbg_write_u16(const unsigned short *val, long len)
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{
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unsigned long dcc_data;
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dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(2) | ((len & 0xffff) << 16));
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while (len > 0)
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{
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dcc_data = val[0]
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| ((len > 1) ? val[1] << 16: 0x0000);
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dbg_write(dcc_data);
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val += 2;
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len -= 2;
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}
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}
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void dbg_write_u8(const unsigned char *val, long len)
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{
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unsigned long dcc_data;
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dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(1) | ((len & 0xffff) << 16));
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while (len > 0)
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{
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dcc_data = val[0]
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| ((len > 1) ? val[1] << 8 : 0x00)
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| ((len > 2) ? val[2] << 16 : 0x00)
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| ((len > 3) ? val[3] << 24 : 0x00);
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dbg_write(dcc_data);
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val += 4;
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len -= 4;
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}
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}
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void dbg_write_str(const char *msg)
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{
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long len;
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unsigned long dcc_data;
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for (len = 0; msg[len] && (len < 65536); len++);
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dbg_write(TARGET_REQ_DEBUGMSG_ASCII | ((len & 0xffff) << 16));
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while (len > 0)
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{
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dcc_data = msg[0]
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| ((len > 1) ? msg[1] << 8 : 0x00)
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| ((len > 2) ? msg[2] << 16 : 0x00)
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| ((len > 3) ? msg[3] << 24 : 0x00);
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dbg_write(dcc_data);
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msg += 4;
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len -= 4;
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}
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}
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void dbg_write_char(char msg)
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{
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dbg_write(TARGET_REQ_DEBUGCHAR | ((msg & 0xff) << 16));
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}
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