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c7073853eb
We want to keep the tri-state buffers located between the FPGA and the board, in 'Z' state until we launch an i2c connection. We launch an i2c start condition, make the SCL direction 'OUT' to start the i2c protocol and at the end of the i2c connection at the stop condition, we re-make the tri-state buffers at 'Z' state. Change-Id: Ic597a70d0427832547f6b539864c24ce20a18c64 Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7989 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
76 lines
2.8 KiB
C
76 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/****************************************************************************
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File : io.h *
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Contents : input/output declaration header file for NanoXplore *
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USB-JTAG ANGIE adapter hardware. *
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Based on openULINK project code by: Martin Schmoelzer. *
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Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
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<aboudjelida@nanoxplore.com> *
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<ahmederrachedbjld@gmail.com> *
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*****************************************************************************/
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#ifndef __IO_H
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#define __IO_H
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#include "reg_ezusb.h"
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/***************************************************************************
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* JTAG Signals: *
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***************************************************************************
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* TMS ....... Test Mode Select *
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* TCK ....... Test Clock *
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* TDI ....... Test Data Input (from device point of view, not JTAG *
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* adapter point of view!) *
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* TDO ....... Test Data Output (from device point of view, not JTAG *
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* adapter point of view!) *
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* TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
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* into the Test Logic Reset state *
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* SRST ..... Chip Reset *
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***************************************************************************/
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/* PORT A */
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/* PA0 Not Connected */
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/* PA1 Not Connected */
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#define PIN_RDWR_B IOA2
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#define PIN_CSI_B IOA3
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#define PIN_INIT_B IOA4
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#define PIN_PROGRAM_B IOA5
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/* PA6 Not Connected */
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/* PA7 Not Connected */
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/* PORT B */
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#define PIN_TRST IOB0
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#define PIN_TMS IOB1
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#define PIN_TCK IOB2
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#define PIN_TDI IOB3
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#define PIN_TDO IOB4
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#define PIN_SRST IOB5
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/* PB6 Not Connected */
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/* PB7 Not Connected */
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/* JTAG Signals with direction 'OUT' on port B */
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/* PIN_TDI - PIN_TCK - PIN_TMS - PIN_TRST - PIN_SRST */
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#define MASK_PORTB_DIRECTION_OUT (bmbit0 | bmbit1 | bmbit2 | bmbit3 | bmbit5)
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/* PORT C */
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#define PIN_T0 IOC0
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#define PIN_T1 IOC1
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#define PIN_T2 IOC2
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#define PIN_T3 IOC3
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#define PIN_T4 IOC4
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/* PC5 Not Connected */
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/* PC6 Not Connected */
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/* PC7 Not Connected */
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/* PORT D */
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#define PIN_SDA IOD0
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#define PIN_SCL IOD1
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#define PIN_SDA_DIR IOD2
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#define PIN_SCL_DIR IOD3
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/* PD4 Not Connected */
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/* PD5 Not Connected */
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/* PD6 Not Connected */
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/* PD7 Not Connected */
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#endif
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