forked from Openwrt/openwrt
f04e377a50
QCA808x does not currently fill in the possible_interfaces. This leads to Phylink not being aware that it supports 2500Base-X as well so in cases where it is connected to a DSA switch like MV88E6393 it will limit that port to phy-mode set in the DTS. That means that if SGMII is used you are limited to 1G only while if 2500Base-X was set you are limited to 2.5G only. Populating the possible_interfaces fixes this, so lets backport the patches from kernel 6.9. This also includes a backport of the Phylink PHY validation series from kernel 6.8 that allows the use of possible_interfaces. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko <robimarko@gmail.com>
48 lines
1.8 KiB
Diff
48 lines
1.8 KiB
Diff
From ce7273c31fadb3143fc80c96a72a42adc19c2757 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Fri, 24 Nov 2023 12:28:24 +0000
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Subject: [PATCH 4/7] net: phylink: pass PHY into phylink_validate_one()
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Pass the phy (if any) into phylink_validate_one() so that we can
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validate each interface with its rate matching setting.
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Tested-by: Luo Jie <quic_luoj@quicinc.com>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Link: https://lore.kernel.org/r/E1r6VIG-00DDLx-Cb@rmk-PC.armlinux.org.uk
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/phylink.c | 7 +++++--
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1 file changed, 5 insertions(+), 2 deletions(-)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -704,7 +704,7 @@ static int phylink_validate_mac_and_pcs(
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return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
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}
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-static void phylink_validate_one(struct phylink *pl,
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+static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
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const unsigned long *supported,
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const struct phylink_link_state *state,
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phy_interface_t interface,
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@@ -719,6 +719,9 @@ static void phylink_validate_one(struct
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tmp_state = *state;
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tmp_state.interface = interface;
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+ if (phy)
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+ tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
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+
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if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
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phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
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interface, phy_modes(interface),
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@@ -740,7 +743,7 @@ static int phylink_validate_mask(struct
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int interface;
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for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
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- phylink_validate_one(pl, supported, state, interface,
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+ phylink_validate_one(pl, NULL, supported, state, interface,
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all_s, all_adv);
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linkmode_copy(supported, all_s);
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