forked from Openwrt/openwrt
fe9d2ccbc3
Move accepted patches to backport folder, re-add previously removed patch
which caused havoc on MT7621 and add the (still pending) fix.
Fixes: d40691a5fb ("generic: 6.1, 6.6: mt7530: import pending patches")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
76 lines
2.5 KiB
Diff
76 lines
2.5 KiB
Diff
From 6cc2d4ccd77509df74b7b8ef46bbc6ba0a571318 Mon Sep 17 00:00:00 2001
|
||
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
|
||
Date: Mon, 22 Apr 2024 10:15:16 +0300
|
||
Subject: [PATCH 09/15] net: dsa: mt7530: define MAC speed capabilities per
|
||
switch model
|
||
MIME-Version: 1.0
|
||
Content-Type: text/plain; charset=UTF-8
|
||
Content-Transfer-Encoding: 8bit
|
||
|
||
With the support of the MT7988 SoC switch, the MAC speed capabilities
|
||
defined on mt753x_phylink_get_caps() won't apply to all switch models
|
||
anymore. Move them to more appropriate locations instead of overwriting
|
||
config->mac_capabilities.
|
||
|
||
Remove the comment on mt753x_phylink_get_caps() as it's become invalid with
|
||
the support of MT7531 and MT7988 SoC switch.
|
||
|
||
Add break to case 6 of mt7988_mac_port_get_caps() to be explicit.
|
||
|
||
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
|
||
---
|
||
drivers/net/dsa/mt7530.c | 15 ++++++++++-----
|
||
1 file changed, 10 insertions(+), 5 deletions(-)
|
||
|
||
--- a/drivers/net/dsa/mt7530.c
|
||
+++ b/drivers/net/dsa/mt7530.c
|
||
@@ -2685,6 +2685,8 @@ mt7531_setup(struct dsa_switch *ds)
|
||
static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
|
||
struct phylink_config *config)
|
||
{
|
||
+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
|
||
+
|
||
switch (port) {
|
||
/* Ports which are connected to switch PHYs. There is no MII pinout. */
|
||
case 0 ... 4:
|
||
@@ -2716,6 +2718,8 @@ static void mt7531_mac_port_get_caps(str
|
||
{
|
||
struct mt7530_priv *priv = ds->priv;
|
||
|
||
+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
|
||
+
|
||
switch (port) {
|
||
/* Ports which are connected to switch PHYs. There is no MII pinout. */
|
||
case 0 ... 4:
|
||
@@ -2755,14 +2759,17 @@ static void mt7988_mac_port_get_caps(str
|
||
case 0 ... 3:
|
||
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
|
||
config->supported_interfaces);
|
||
+
|
||
+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
|
||
break;
|
||
|
||
/* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */
|
||
case 6:
|
||
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
|
||
config->supported_interfaces);
|
||
- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
|
||
- MAC_10000FD;
|
||
+
|
||
+ config->mac_capabilities |= MAC_10000FD;
|
||
+ break;
|
||
}
|
||
}
|
||
|
||
@@ -2932,9 +2939,7 @@ static void mt753x_phylink_get_caps(stru
|
||
{
|
||
struct mt7530_priv *priv = ds->priv;
|
||
|
||
- /* This switch only supports full-duplex at 1Gbps */
|
||
- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
|
||
- MAC_10 | MAC_100 | MAC_1000FD;
|
||
+ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;
|
||
|
||
priv->info->mac_port_get_caps(ds, port, config);
|
||
}
|