forked from Openwrt/openwrt
134 lines
3.9 KiB
Diff
134 lines
3.9 KiB
Diff
From c8efcf7a86ebf2ff48584d270b3070a7075bc345 Mon Sep 17 00:00:00 2001
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From: Richard Alpe <richard@bit42.se>
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Date: Mon, 10 Apr 2023 10:20:51 +0200
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Subject: [PATCH] nvmem: add new NXP QorIQ eFuse driver
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add SFP (Security Fuse Processor) read support for NXP (Freescale)
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QorIQ series SOC's.
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This patch adds support for the T1023 SOC using the SFP offset from
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the existing T1023 device tree. In theory this should also work for
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T1024, T1014 and T1013 which uses the same SFP base offset.
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Signed-off-by: Richard Alpe <richard@bit42.se>
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Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se>
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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---
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drivers/nvmem/Kconfig | 12 ++++++
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drivers/nvmem/Makefile | 2 +
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drivers/nvmem/qoriq-efuse.c | 78 +++++++++++++++++++++++++++++++++++++
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3 files changed, 92 insertions(+)
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create mode 100644 drivers/nvmem/qoriq-efuse.c
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--- a/drivers/nvmem/Kconfig
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+++ b/drivers/nvmem/Kconfig
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@@ -392,4 +392,16 @@ config NVMEM_ZYNQMP
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If sure, say yes. If unsure, say no.
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+config NVMEM_QORIQ_EFUSE
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+ tristate "NXP QorIQ eFuse support"
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+ depends on PPC_85xx || COMPILE_TEST
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+ depends on HAS_IOMEM
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+ help
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+ This driver provides read support for the eFuses (SFP) on NXP QorIQ
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+ series SoC's. This includes secure boot settings, the globally unique
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+ NXP ID 'FUIDR' and the OEM unique ID 'OUIDR'.
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+
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+ This driver can also be built as a module. If so, the module
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+ will be called nvmem_qoriq_efuse.
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+
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endif
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--- a/drivers/nvmem/Makefile
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+++ b/drivers/nvmem/Makefile
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@@ -77,3 +77,5 @@ obj-$(CONFIG_NVMEM_VF610_OCOTP) += nvme
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nvmem-vf610-ocotp-y := vf610-ocotp.o
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obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynqmp_nvmem.o
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nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o
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+obj-$(CONFIG_NVMEM_QORIQ_EFUSE) += nvmem-qoriq-efuse.o
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+nvmem-qoriq-efuse-y := qoriq-efuse.o
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--- /dev/null
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+++ b/drivers/nvmem/qoriq-efuse.c
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@@ -0,0 +1,78 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright (C) 2023 Westermo Network Technologies AB
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/mod_devicetable.h>
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+#include <linux/nvmem-provider.h>
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+#include <linux/platform_device.h>
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+
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+struct qoriq_efuse_priv {
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+ void __iomem *base;
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+};
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+
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+static int qoriq_efuse_read(void *context, unsigned int offset, void *val,
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+ size_t bytes)
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+{
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+ struct qoriq_efuse_priv *priv = context;
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+
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+ /* .stride = 4 so offset is guaranteed to be aligned */
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+ __ioread32_copy(val, priv->base + offset, bytes / 4);
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+
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+ /* Ignore trailing bytes (there shouldn't be any) */
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+
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+ return 0;
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+}
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+
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+static int qoriq_efuse_probe(struct platform_device *pdev)
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+{
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+ struct nvmem_config config = {
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+ .dev = &pdev->dev,
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+ .read_only = true,
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+ .reg_read = qoriq_efuse_read,
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+ .stride = sizeof(u32),
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+ .word_size = sizeof(u32),
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+ .name = "qoriq_efuse_read",
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+ .id = NVMEM_DEVID_AUTO,
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+ .root_only = true,
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+ };
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+ struct qoriq_efuse_priv *priv;
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+ struct nvmem_device *nvmem;
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+ struct resource *res;
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+
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+ priv = devm_kzalloc(config.dev, sizeof(*priv), GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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+ if (IS_ERR(priv->base))
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+ return PTR_ERR(priv->base);
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+
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+ config.size = resource_size(res);
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+ config.priv = priv;
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+ nvmem = devm_nvmem_register(config.dev, &config);
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+
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+ return PTR_ERR_OR_ZERO(nvmem);
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+}
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+
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+static const struct of_device_id qoriq_efuse_of_match[] = {
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+ { .compatible = "fsl,t1023-sfp", },
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+ {/* sentinel */},
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+};
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+MODULE_DEVICE_TABLE(of, qoriq_efuse_of_match);
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+
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+static struct platform_driver qoriq_efuse_driver = {
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+ .probe = qoriq_efuse_probe,
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+ .driver = {
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+ .name = "qoriq-efuse",
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+ .of_match_table = qoriq_efuse_of_match,
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+ },
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+};
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+module_platform_driver(qoriq_efuse_driver);
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+
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+MODULE_AUTHOR("Richard Alpe <richard.alpe@bit42.se>");
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+MODULE_DESCRIPTION("NXP QorIQ Security Fuse Processor (SFP) Reader");
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+MODULE_LICENSE("GPL");
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