forked from Openwrt/openwrt
fc9cb9b609
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.93
Removed upstreamed:
bcm27xx/patches-6.1/950-0081-smsx95xx-fix-crimes-against-truesize.patch
reference: 517e64bcc9
Manually rebased:
bcm27xx/patches-6.1/950-0712-drm-vc4-Use-phys-addresses-for-slave-DMA-config.patch
All other patches automatically rebased.
Build system: bcm53xx ath79
Signed-off-by: Zxl hhyccc <zxlhhy@gmail.com>
111 lines
4.1 KiB
Diff
111 lines
4.1 KiB
Diff
From cef945452c8468efce75ba0dc8420510a5b84af9 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
|
|
Date: Mon, 29 May 2023 10:02:45 +0200
|
|
Subject: [PATCH 5/6] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
|
|
port_max_speed_mode
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
Some switches families have minor differences on supported link speed for
|
|
ports. Instead of redefining a new port_max_speed_mode for each different
|
|
configuration, allow to pass mv88e6xxx_chip structure to allow
|
|
differentiating those chips by known chip id
|
|
|
|
Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
|
|
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
---
|
|
drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
|
|
drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
|
|
drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
|
|
drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
|
|
4 files changed, 19 insertions(+), 10 deletions(-)
|
|
|
|
--- a/drivers/net/dsa/mv88e6xxx/chip.c
|
|
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
|
|
@@ -3350,7 +3350,7 @@ static int mv88e6xxx_setup_port(struct m
|
|
caps = pl_config.mac_capabilities;
|
|
|
|
if (chip->info->ops->port_max_speed_mode)
|
|
- mode = chip->info->ops->port_max_speed_mode(port);
|
|
+ mode = chip->info->ops->port_max_speed_mode(chip, port);
|
|
else
|
|
mode = PHY_INTERFACE_MODE_NA;
|
|
|
|
--- a/drivers/net/dsa/mv88e6xxx/chip.h
|
|
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
|
|
@@ -514,7 +514,8 @@ struct mv88e6xxx_ops {
|
|
int speed, int duplex);
|
|
|
|
/* What interface mode should be used for maximum speed? */
|
|
- phy_interface_t (*port_max_speed_mode)(int port);
|
|
+ phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
|
|
+ int port);
|
|
|
|
int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
|
|
|
|
--- a/drivers/net/dsa/mv88e6xxx/port.c
|
|
+++ b/drivers/net/dsa/mv88e6xxx/port.c
|
|
@@ -342,7 +342,8 @@ int mv88e6341_port_set_speed_duplex(stru
|
|
duplex);
|
|
}
|
|
|
|
-phy_interface_t mv88e6341_port_max_speed_mode(int port)
|
|
+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port)
|
|
{
|
|
if (port == 5)
|
|
return PHY_INTERFACE_MODE_2500BASEX;
|
|
@@ -381,7 +382,8 @@ int mv88e6390_port_set_speed_duplex(stru
|
|
duplex);
|
|
}
|
|
|
|
-phy_interface_t mv88e6390_port_max_speed_mode(int port)
|
|
+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port)
|
|
{
|
|
if (port == 9 || port == 10)
|
|
return PHY_INTERFACE_MODE_2500BASEX;
|
|
@@ -403,7 +405,8 @@ int mv88e6390x_port_set_speed_duplex(str
|
|
duplex);
|
|
}
|
|
|
|
-phy_interface_t mv88e6390x_port_max_speed_mode(int port)
|
|
+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port)
|
|
{
|
|
if (port == 9 || port == 10)
|
|
return PHY_INTERFACE_MODE_XAUI;
|
|
@@ -500,7 +503,8 @@ int mv88e6393x_port_set_speed_duplex(str
|
|
return 0;
|
|
}
|
|
|
|
-phy_interface_t mv88e6393x_port_max_speed_mode(int port)
|
|
+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port)
|
|
{
|
|
if (port == 0 || port == 9 || port == 10)
|
|
return PHY_INTERFACE_MODE_10GBASER;
|
|
--- a/drivers/net/dsa/mv88e6xxx/port.h
|
|
+++ b/drivers/net/dsa/mv88e6xxx/port.h
|
|
@@ -359,10 +359,14 @@ int mv88e6390x_port_set_speed_duplex(str
|
|
int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
|
int speed, int duplex);
|
|
|
|
-phy_interface_t mv88e6341_port_max_speed_mode(int port);
|
|
-phy_interface_t mv88e6390_port_max_speed_mode(int port);
|
|
-phy_interface_t mv88e6390x_port_max_speed_mode(int port);
|
|
-phy_interface_t mv88e6393x_port_max_speed_mode(int port);
|
|
+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port);
|
|
+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port);
|
|
+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port);
|
|
+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
|
|
+ int port);
|
|
|
|
int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
|
|
|