forked from Openwrt/openwrt
f631c7bbb1
Import commits from upstream Linux replacing some downstream patches.
Move accepted patches from pending-{5.15,6.1} to backport-{5.15,6.1}.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
59 lines
2.0 KiB
Diff
59 lines
2.0 KiB
Diff
From 88a0fd5927b7c2c7aecd6dc747d898eb38043d2b Mon Sep 17 00:00:00 2001
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From: Felix Fietkau <nbd@nbd.name>
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Date: Thu, 20 Apr 2023 22:06:42 +0100
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Subject: [PATCH 093/250] net: mtk_eth_soc: mediatek: fix ppe flow accounting
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for v1 hardware
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Older chips (like MT7622) use a different bit in ib2 to enable hardware
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counter support. Add macros for both and select the appropriate bit.
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Fixes: 3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting")
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/mediatek/mtk_ppe.c | 10 ++++++++--
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drivers/net/ethernet/mediatek/mtk_ppe.h | 3 ++-
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2 files changed, 10 insertions(+), 3 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
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+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
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@@ -599,6 +599,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
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struct mtk_eth *eth = ppe->eth;
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u16 timestamp = mtk_eth_timestamp(eth);
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struct mtk_foe_entry *hwe;
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+ u32 val;
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
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entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2;
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@@ -615,8 +616,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
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wmb();
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hwe->ib1 = entry->ib1;
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- if (ppe->accounting)
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- *mtk_foe_entry_ib2(eth, hwe) |= MTK_FOE_IB2_MIB_CNT;
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+ if (ppe->accounting) {
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+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
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+ val = MTK_FOE_IB2_MIB_CNT_V2;
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+ else
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+ val = MTK_FOE_IB2_MIB_CNT;
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+ *mtk_foe_entry_ib2(eth, hwe) |= val;
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+ }
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dma_wmb();
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--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
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+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
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@@ -55,9 +55,10 @@ enum {
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#define MTK_FOE_IB2_PSE_QOS BIT(4)
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#define MTK_FOE_IB2_DEST_PORT GENMASK(7, 5)
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#define MTK_FOE_IB2_MULTICAST BIT(8)
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+#define MTK_FOE_IB2_MIB_CNT BIT(10)
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#define MTK_FOE_IB2_WDMA_QID2 GENMASK(13, 12)
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-#define MTK_FOE_IB2_MIB_CNT BIT(15)
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+#define MTK_FOE_IB2_MIB_CNT_V2 BIT(15)
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#define MTK_FOE_IB2_WDMA_DEVIDX BIT(16)
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#define MTK_FOE_IB2_WDMA_WINFO BIT(17)
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