forked from Openwrt/openwrt
8dfe69cdfc
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
83 lines
2.6 KiB
Diff
83 lines
2.6 KiB
Diff
From fbfc4ca465a1f8d81bf2d67d95bf7fc67c3cf0c2 Mon Sep 17 00:00:00 2001
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From: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Date: Fri, 18 Nov 2022 06:39:20 +0000
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Subject: [PATCH] nvmem: stm32: move STM32MP15_BSEC_NUM_LOWER in config
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Support STM32MP15_BSEC_NUM_LOWER in stm32 romem config to prepare
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the next SoC in STM32MP family.
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Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Link: https://lore.kernel.org/r/20221118063932.6418-2-srinivas.kandagatla@linaro.org
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/nvmem/stm32-romem.c | 21 ++++++++++++++++-----
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1 file changed, 16 insertions(+), 5 deletions(-)
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--- a/drivers/nvmem/stm32-romem.c
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+++ b/drivers/nvmem/stm32-romem.c
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@@ -22,16 +22,15 @@
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/* shadow registers offest */
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#define STM32MP15_BSEC_DATA0 0x200
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-/* 32 (x 32-bits) lower shadow registers */
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-#define STM32MP15_BSEC_NUM_LOWER 32
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-
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struct stm32_romem_cfg {
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int size;
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+ u8 lower;
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};
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struct stm32_romem_priv {
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void __iomem *base;
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struct nvmem_config cfg;
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+ u8 lower;
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};
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static int stm32_romem_read(void *context, unsigned int offset, void *buf,
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@@ -85,7 +84,7 @@ static int stm32_bsec_read(void *context
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for (i = roffset; (i < roffset + rbytes); i += 4) {
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u32 otp = i >> 2;
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- if (otp < STM32MP15_BSEC_NUM_LOWER) {
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+ if (otp < priv->lower) {
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/* read lower data from shadow registers */
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val = readl_relaxed(
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priv->base + STM32MP15_BSEC_DATA0 + i);
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@@ -159,6 +158,8 @@ static int stm32_romem_probe(struct plat
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priv->cfg.priv = priv;
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priv->cfg.owner = THIS_MODULE;
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+ priv->lower = 0;
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+
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cfg = (const struct stm32_romem_cfg *)
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of_match_device(dev->driver->of_match_table, dev)->data;
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if (!cfg) {
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@@ -167,6 +168,7 @@ static int stm32_romem_probe(struct plat
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priv->cfg.reg_read = stm32_romem_read;
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} else {
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priv->cfg.size = cfg->size;
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+ priv->lower = cfg->lower;
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priv->cfg.reg_read = stm32_bsec_read;
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priv->cfg.reg_write = stm32_bsec_write;
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}
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@@ -174,8 +176,17 @@ static int stm32_romem_probe(struct plat
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return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg));
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}
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+/*
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+ * STM32MP15 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
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+ * => 96 x 32-bits data words
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+ * - Lower: 1K bits, 2:1 redundancy, incremental bit programming
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+ * => 32 (x 32-bits) lower shadow registers = words 0 to 31
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+ * - Upper: 2K bits, ECC protection, word programming only
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+ * => 64 (x 32-bits) = words 32 to 95
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+ */
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static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
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- .size = 384, /* 96 x 32-bits data words */
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+ .size = 384,
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+ .lower = 32,
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};
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static const struct of_device_id stm32_romem_of_match[] = {
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