forked from Openwrt/openwrt
9a038e7fd1
Copy config and patches from kernel 5.10 to kernel 5.15 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
30 lines
1.3 KiB
Diff
30 lines
1.3 KiB
Diff
From 731d613338ec6de482053ffa3f71be2325b0f8eb Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Thu, 14 Oct 2021 00:39:09 +0200
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Subject: dt-bindings: net: dsa: qca8k: Document support for CPU port 6
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The switch now support CPU port to be set 6 instead of be hardcoded to
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0. Document support for it and describe logic selection.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 +++++-
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1 file changed, 5 insertions(+), 1 deletion(-)
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--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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@@ -29,7 +29,11 @@ the mdio MASTER is used as communication
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Don't use mixed external and internal mdio-bus configurations, as this is
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not supported by the hardware.
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-The CPU port of this switch is always port 0.
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+This switch support 2 CPU port. Normally and advised configuration is with
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+CPU port set to port 0. It is also possible to set the CPU port to port 6
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+if the device requires it. The driver will configure the switch to the defined
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+port. With both CPU port declared the first CPU port is selected as primary
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+and the secondary CPU ignored.
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A CPU port node has the following optional node:
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