forked from Openwrt/openwrt
e74ead2249
The patches were generated from the RPi repo with the following command: git format-patch v6.6.36..rpi-6.6.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
42 lines
1.7 KiB
Diff
42 lines
1.7 KiB
Diff
From b35cdbcc3966e61b87d1e89f3ac8e172f15be4ff Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 14 Mar 2024 21:32:32 +0000
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Subject: [PATCH 0967/1085] dmaengine: dw-axi-dmac: Fix a non-atomic update
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dw_axi_dma_interrupt disables interrupts for the duration of the channel
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handling. It does so by clearing a bit in the DMA_CFG register - an
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action that involves a read-modify-write. That in itself would be safe
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because there will be no further interrupts, hence no reentrancy, were
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it the only bit of code accessing that register.
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The only neighbour of INT_EN is DMAC_EN - the main enable for the block.
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That's not the sort of thing you would expect to be modified during the
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normal course of operation, but bizarrely it is set at the start of the
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transfer of every block, in axi_chan_block_xfer_star, by a call to
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axi_dma_enable. This can lead to INT_EN being accidentally cleared,
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which causes all DMA transfers to time out.
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One might think that the enabling was being delayed until the first
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transfer, but the probe function calls axi_dma_resume which in turn
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calls axi_dma_enable, so that isn't the case.
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Fix the atomicity problem by removing the spurious call to
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axi_dma_enable.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 2 --
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1 file changed, 2 deletions(-)
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--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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@@ -389,8 +389,6 @@ static void axi_chan_block_xfer_start(st
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return;
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}
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- axi_dma_enable(chan->chip);
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-
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config.dst_multblk_type = DWAXIDMAC_MBLK_TYPE_LL;
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config.src_multblk_type = DWAXIDMAC_MBLK_TYPE_LL;
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config.tt_fc = DWAXIDMAC_TT_FC_MEM_TO_MEM_DMAC;
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