forked from Openwrt/openwrt
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
949 lines
22 KiB
Diff
949 lines
22 KiB
Diff
From c2ec9eb29f257c1dbc40e9b5e1ba93e62524b3c2 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Fri, 26 Jan 2024 16:27:28 +0000
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Subject: [PATCH 0893/1085] ARM: dts: Add CM5 DTS support
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The CM5 is a platform that will appear in multiple boards, each of
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which may have different connectivity. Split the CM5 DTS into a common
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cm5.dtsi and board-specific dts files, where the CM5 DTS file (the one
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loaded by the firmware by default) is an alias for the CM5IO DTS file.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts | 22 +
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.../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts | 12 +
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.../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 859 ++++++++++++++++++
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arch/arm64/boot/dts/broadcom/Makefile | 2 +
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.../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts | 2 +
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.../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts | 2 +
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6 files changed, 899 insertions(+)
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
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create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
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create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
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--- /dev/null
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+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
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@@ -0,0 +1,22 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+
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+#include "bcm2712-rpi-cm5.dtsi"
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+
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+i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility
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+
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+// The RP1 USB3 interfaces are not usable on CM4IO
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+
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+&rp1_usb0 {
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+ status = "disabled";
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+};
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+
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+&rp1_usb1 {
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+ status = "disabled";
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+};
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+
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+/ {
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+ __overrides__ {
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+ i2c_csi_dsi = <&i2c_csi_dsi>, "status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
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@@ -0,0 +1,12 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+
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+#include "bcm2712-rpi-cm5.dtsi"
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+
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+i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility
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+
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+/ {
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+ __overrides__ {
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+ i2c_csi_dsi = <&i2c_csi_dsi>, "status";
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
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@@ -0,0 +1,859 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/clock/rp1.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/mfd/rp1.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
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+
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+#define i2c0 _i2c0
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+#define i2c3 _i2c3
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+#define i2c4 _i2c4
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+#define i2c5 _i2c5
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+#define i2c6 _i2c6
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+#define i2c8 _i2c8
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+#define i2s _i2s
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+#define pwm0 _pwm0
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+#define pwm1 _pwm1
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+#define spi0 _spi0
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+#define spi3 _spi3
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+#define spi4 _spi4
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+#define spi5 _spi5
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+#define spi6 _spi6
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+#define uart0 _uart0
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+#define uart2 _uart2
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+#define uart5 _uart5
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+
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+#include "bcm2712.dtsi"
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+
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+#undef i2c0
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+#undef i2c3
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+#undef i2c4
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+#undef i2c5
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+#undef i2c6
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+#undef i2c8
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+#undef i2s
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+#undef pwm0
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+#undef pwm1
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+#undef spi0
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+#undef spi3
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+#undef spi4
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+#undef spi5
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+#undef spi6
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+#undef uart0
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+#undef uart2
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+#undef uart3
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+#undef uart4
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+#undef uart5
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+
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+/ {
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+ compatible = "raspberrypi,5-compute-model", "brcm,bcm2712";
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+ model = "Raspberry Pi Compute Module 5";
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+
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+ /* Will be filled by the bootloader */
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0 0 0x28000000>;
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+ };
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+
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+ leds: leds {
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+ compatible = "gpio-leds";
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+
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+ led_pwr: led-pwr {
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+ label = "PWR";
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+ gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ linux,default-trigger = "none";
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+ };
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+
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+ led_act: led-act {
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+ label = "ACT";
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+ gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ linux,default-trigger = "mmc0";
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+ };
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+ };
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+
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+ sd_io_1v8_reg: sd_io_1v8_reg {
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+ compatible = "regulator-gpio";
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+ regulator-name = "vdd-sd-io";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-settling-time-us = <5000>;
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+ gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ status = "okay";
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+ };
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+
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+ sd_vcc_reg: sd_vcc_reg {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ enable-active-high;
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+ gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+ };
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+
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+ wl_on_reg: wl_on_reg {
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+ compatible = "regulator-fixed";
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+ regulator-name = "wl-on-regulator";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ pinctrl-0 = <&wl_on_pins>;
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+ pinctrl-names = "default";
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+
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+ gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
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+
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+ startup-delay-us = <150000>;
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+ enable-active-high;
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+ };
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+
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+ clocks: clocks {
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+ };
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+
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+ cam1_clk: cam1_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ cam0_clk: cam0_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ status = "disabled";
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+ };
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+
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+ cam0_reg: cam0_reg {
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+ compatible = "regulator-fixed";
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+ regulator-name = "cam0_reg";
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+ enable-active-high;
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+ status = "okay";
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+ gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector
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+ };
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+
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+ cam_dummy_reg: cam_dummy_reg {
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+ compatible = "regulator-fixed";
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+ regulator-name = "cam-dummy-reg";
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+ status = "okay";
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+ };
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+
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+ dummy: dummy {
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+ // A target for unwanted overlay fragments
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+ };
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+
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+
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+ // A few extra labels to keep overlays happy
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+
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+ i2c0if: i2c0if {};
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+ i2c0mux: i2c0mux {};
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+};
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+
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+rp1_target: &pcie2 {
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+ brcm,enable-mps-rcb;
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+ brcm,vdm-qos-map = <0xbbaa9888>;
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+ aspm-no-l0s;
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+ status = "okay";
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+};
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+
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+// Add some labels to 2712 device
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+
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+// The system UART
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+uart10: &_uart0 { status = "okay"; };
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+
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+// The system SPI for the bootloader EEPROM
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+spi10: &_spi0 { status = "okay"; };
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+
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+i2c_rp1boot: &_i2c3 { };
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+
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+#include "rp1.dtsi"
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+
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+&rp1 {
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+ // PCIe address space layout:
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+ // 00_00000000-00_00xxxxxx = RP1 peripherals
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+ // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
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+
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+ // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
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+ // This is the RP1 peripheral space
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+ ranges = <0xc0 0x40000000
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+ 0x02000000 0x00 0x00000000
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+ 0x00 0x00400000>;
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+
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+ dma-ranges =
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+ // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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+ <0x10 0x00000000
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+ 0x43000000 0x10 0x00000000
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+ 0x10 0x00000000>,
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+
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+ // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
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+ // This allows the RP1 DMA controller to address RP1 hardware
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+ <0xc0 0x40000000
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+ 0x02000000 0x0 0x00000000
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+ 0x0 0x00400000>,
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+
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+ // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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+ <0x00 0x00000000
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+ 0x02000000 0x10 0x00000000
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+ 0x10 0x00000000>;
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+};
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+
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+// Expose RP1 nodes as system nodes with labels
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+
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+&rp1_dma {
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+ status = "okay";
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+};
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+
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+&rp1_eth {
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+ status = "okay";
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+ phy-handle = <&phy1>;
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+ phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
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+ phy-reset-duration = <5>;
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+
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+ phy1: ethernet-phy@1 {
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+ reg = <0x1>;
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+ brcm,powerdown-enable;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <37 IRQ_TYPE_LEVEL_LOW>;
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+ };
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+};
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+
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+gpio: &rp1_gpio {
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+ status = "okay";
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+};
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+
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+aux: &dummy {};
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+
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+&rp1_usb0 {
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+ pinctrl-0 = <&usb_vbus_pins>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+};
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+
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+&rp1_usb1 {
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+ status = "okay";
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+};
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+
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+#include "bcm2712-rpi.dtsi"
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+
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+i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
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+ pinctrl-0 = <&rp1_i2c6_38_39>;
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+ pinctrl-names = "default";
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+ clock-frequency = <100000>;
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+};
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+
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+i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector
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+};
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+
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+i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility
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+
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+cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg
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+};
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+
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+csi0: &rp1_csi0 { };
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+csi1: &rp1_csi1 { };
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+dsi0: &rp1_dsi0 { };
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+dsi1: &rp1_dsi1 { };
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+dpi: &rp1_dpi { };
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+vec: &rp1_vec { };
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+dpi_gpio0: &rp1_dpi_24bit_gpio0 { };
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+dpi_gpio1: &rp1_dpi_24bit_gpio2 { };
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+dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
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+dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
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+dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { };
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+dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { };
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+dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
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+dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
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+dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { };
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+dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { };
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+
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+/* Add the IOMMUs for some RP1 bus masters */
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+
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+&csi0 {
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+ iommus = <&iommu5>;
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+};
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+
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+&csi1 {
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+ iommus = <&iommu5>;
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+};
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+
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+&dsi0 {
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+ iommus = <&iommu5>;
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+};
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+
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+&dsi1 {
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+ iommus = <&iommu5>;
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+};
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+
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+&dpi {
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+ iommus = <&iommu5>;
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+};
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+
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+&vec {
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+ iommus = <&iommu5>;
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+};
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+
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+&ddc0 {
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+ status = "disabled";
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+};
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+
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+&ddc1 {
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+ status = "disabled";
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+};
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+
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+&hdmi0 {
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+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
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+ clock-names = "hdmi", "bvb", "audio", "cec";
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+ status = "disabled";
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+};
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+
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+&hdmi1 {
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+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
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+ clock-names = "hdmi", "bvb", "audio", "cec";
|
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+ status = "disabled";
|
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+};
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+
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+&hvs {
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+ clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
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+ clock-names = "core", "disp";
|
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+};
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+
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+&mop {
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+ status = "disabled";
|
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+};
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+
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+&moplet {
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+ status = "disabled";
|
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+};
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+
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+&pixelvalve0 {
|
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+ status = "disabled";
|
|
+};
|
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+
|
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+&pixelvalve1 {
|
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+ status = "disabled";
|
|
+};
|
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+
|
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+&disp_intr {
|
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+ status = "disabled";
|
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+};
|
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+
|
|
+/* SDIO1 is used to drive the eMMC/SD card */
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+&sdio1 {
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+ pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>, <&emmc_aon_cd_pins>;
|
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+ pinctrl-names = "default";
|
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+ vqmmc-supply = <&sd_io_1v8_reg>;
|
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+ vmmc-supply = <&sd_vcc_reg>;
|
|
+ bus-width = <8>;
|
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+ sd-uhs-sdr50;
|
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+ sd-uhs-ddr50;
|
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+ sd-uhs-sdr104;
|
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+ mmc-hs200-1_8v;
|
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+ mmc-hs400-1_8v;
|
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+ broken-cd;
|
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+ status = "okay";
|
|
+};
|
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+
|
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+&pinctrl_aon {
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+ emmc_aon_cd_pins: emmc_aon_cd_pins {
|
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+ function = "sd_card_g";
|
|
+ pins = "aon_gpio5";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ /* Slight hack - only one PWM pin (status LED) is usable */
|
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+ aon_pwm_1pin: aon_pwm_1pin {
|
|
+ function = "aon_pwm";
|
|
+ pins = "aon_gpio9";
|
|
+ };
|
|
+};
|
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+
|
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+&pinctrl {
|
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+ pwr_button_pins: pwr_button_pins {
|
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+ function = "gpio";
|
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+ pins = "gpio20";
|
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+ bias-pull-up;
|
|
+ };
|
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+
|
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+ wl_on_pins: wl_on_pins {
|
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+ function = "gpio";
|
|
+ pins = "gpio28";
|
|
+ };
|
|
+
|
|
+ bt_shutdown_pins: bt_shutdown_pins {
|
|
+ function = "gpio";
|
|
+ pins = "gpio29";
|
|
+ };
|
|
+
|
|
+ emmc_ds_pull: emmc_ds_pull {
|
|
+ pins = "emmc_ds";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
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+ emmc_cmddat_pulls: emmc_cmddat_pulls {
|
|
+ pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3",
|
|
+ "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* uarta communicates with the BT module */
|
|
+&uarta {
|
|
+ uart-has-rtscts;
|
|
+ auto-flow-control;
|
|
+ status = "okay";
|
|
+ clock-frequency = <96000000>;
|
|
+ pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ bluetooth: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <3000000>;
|
|
+ shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
|
|
+ local-bd-address = [ 00 00 00 00 00 00 ];
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c_rp1boot {
|
|
+ clock-frequency = <400000>;
|
|
+ pinctrl-0 = <&i2c3_m4_agpio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+/ {
|
|
+ chosen: chosen {
|
|
+ bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ stdout-path = "serial10:115200n8";
|
|
+ };
|
|
+
|
|
+ fan: cooling_fan {
|
|
+ status = "disabled";
|
|
+ compatible = "pwm-fan";
|
|
+ #cooling-cells = <2>;
|
|
+ cooling-min-state = <0>;
|
|
+ cooling-max-state = <3>;
|
|
+ cooling-levels = <0 75 125 175 250>;
|
|
+ pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
|
|
+ rpm-regmap = <&rp1_pwm1>;
|
|
+ rpm-offset = <0x3c>;
|
|
+ };
|
|
+
|
|
+ pwr_button {
|
|
+ compatible = "gpio-keys";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwr_button_pins>;
|
|
+ status = "okay";
|
|
+
|
|
+ pwr_key: pwr {
|
|
+ label = "pwr_button";
|
|
+ // linux,code = <205>; // KEY_SUSPEND
|
|
+ linux,code = <116>; // KEY_POWER
|
|
+ gpios = <&gio 20 GPIO_ACTIVE_LOW>;
|
|
+ debounce-interval = <50>; // ms
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&usb {
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
+};
|
|
+
|
|
+/* SDIO2 drives the WLAN interface */
|
|
+&sdio2 {
|
|
+ pinctrl-0 = <&sdio2_30_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ bus-width = <4>;
|
|
+ vmmc-supply = <&wl_on_reg>;
|
|
+ sd-uhs-ddr50;
|
|
+ non-removable;
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ wifi: wifi@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ local-mac-address = [00 00 00 00 00 00];
|
|
+ };
|
|
+};
|
|
+
|
|
+&rpivid {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ spi10_gpio2: spi10_gpio2 {
|
|
+ function = "vc_spi0";
|
|
+ pins = "gpio2", "gpio3", "gpio4";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ spi10_cs_gpio1: spi10_cs_gpio1 {
|
|
+ function = "gpio";
|
|
+ pins = "gpio1";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+};
|
|
+
|
|
+spi10_pins: &spi10_gpio2 {};
|
|
+spi10_cs_pins: &spi10_cs_gpio1 {};
|
|
+
|
|
+&spi10 {
|
|
+ pinctrl-names = "default";
|
|
+ cs-gpios = <&gio 1 1>;
|
|
+ pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
|
|
+
|
|
+ spidev10: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+&gio_aon {
|
|
+ // Don't use GIO_AON as an interrupt controller because it will
|
|
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
|
|
+
|
|
+ /delete-property/ interrupt-controller;
|
|
+};
|
|
+
|
|
+&main_aon_irq {
|
|
+ // Don't use the MAIN_AON_IRQ interrupt controller because it will
|
|
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
|
|
+
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&rp1_pwm1 {
|
|
+ status = "disabled";
|
|
+ pinctrl-0 = <&rp1_pwm1_gpio45>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+&thermal_trips {
|
|
+ cpu_tepid: cpu-tepid {
|
|
+ temperature = <50000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_warm: cpu-warm {
|
|
+ temperature = <60000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_hot: cpu-hot {
|
|
+ temperature = <67500>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_vhot: cpu-vhot {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+};
|
|
+
|
|
+&cooling_maps {
|
|
+ tepid {
|
|
+ trip = <&cpu_tepid>;
|
|
+ cooling-device = <&fan 1 1>;
|
|
+ };
|
|
+
|
|
+ warm {
|
|
+ trip = <&cpu_warm>;
|
|
+ cooling-device = <&fan 2 2>;
|
|
+ };
|
|
+
|
|
+ hot {
|
|
+ trip = <&cpu_hot>;
|
|
+ cooling-device = <&fan 3 3>;
|
|
+ };
|
|
+
|
|
+ vhot {
|
|
+ trip = <&cpu_vhot>;
|
|
+ cooling-device = <&fan 4 4>;
|
|
+ };
|
|
+
|
|
+ melt {
|
|
+ trip = <&cpu_crit>;
|
|
+ cooling-device = <&fan 4 4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gio {
|
|
+ // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
|
|
+ // to reduce the clutter in gpioinfo/pinctrl
|
|
+ brcm,gpio-bank-widths = <32 4>;
|
|
+
|
|
+ gpio-line-names =
|
|
+ "-", // GPIO_000
|
|
+ "2712_BOOT_CS_N", // GPIO_001
|
|
+ "2712_BOOT_MISO", // GPIO_002
|
|
+ "2712_BOOT_MOSI", // GPIO_003
|
|
+ "2712_BOOT_SCLK", // GPIO_004
|
|
+ "-", // GPIO_005
|
|
+ "-", // GPIO_006
|
|
+ "-", // GPIO_007
|
|
+ "-", // GPIO_008
|
|
+ "-", // GPIO_009
|
|
+ "-", // GPIO_010
|
|
+ "-", // GPIO_011
|
|
+ "-", // GPIO_012
|
|
+ "-", // GPIO_013
|
|
+ "-", // GPIO_014
|
|
+ "-", // GPIO_015
|
|
+ "-", // GPIO_016
|
|
+ "-", // GPIO_017
|
|
+ "-", // GPIO_018
|
|
+ "-", // GPIO_019
|
|
+ "PWR_GPIO", // GPIO_020
|
|
+ "2712_G21_FS", // GPIO_021
|
|
+ "-", // GPIO_022
|
|
+ "-", // GPIO_023
|
|
+ "BT_RTS", // GPIO_024
|
|
+ "BT_CTS", // GPIO_025
|
|
+ "BT_TXD", // GPIO_026
|
|
+ "BT_RXD", // GPIO_027
|
|
+ "WL_ON", // GPIO_028
|
|
+ "BT_ON", // GPIO_029
|
|
+ "WIFI_SDIO_CLK", // GPIO_030
|
|
+ "WIFI_SDIO_CMD", // GPIO_031
|
|
+ "WIFI_SDIO_D0", // GPIO_032
|
|
+ "WIFI_SDIO_D1", // GPIO_033
|
|
+ "WIFI_SDIO_D2", // GPIO_034
|
|
+ "WIFI_SDIO_D3"; // GPIO_035
|
|
+};
|
|
+
|
|
+&gio_aon {
|
|
+ gpio-line-names =
|
|
+ "RP1_SDA", // AON_GPIO_00
|
|
+ "RP1_SCL", // AON_GPIO_01
|
|
+ "RP1_RUN", // AON_GPIO_02
|
|
+ "SD_IOVDD_SEL", // AON_GPIO_03
|
|
+ "SD_PWR_ON", // AON_GPIO_04
|
|
+ "ANT1", // AON_GPIO_05
|
|
+ "ANT2", // AON_GPIO_06
|
|
+ "-", // AON_GPIO_07
|
|
+ "2712_WAKE", // AON_GPIO_08
|
|
+ "2712_STAT_LED", // AON_GPIO_09
|
|
+ "-", // AON_GPIO_10
|
|
+ "-", // AON_GPIO_11
|
|
+ "PMIC_INT", // AON_GPIO_12
|
|
+ "UART_TX_FS", // AON_GPIO_13
|
|
+ "UART_RX_FS", // AON_GPIO_14
|
|
+ "-", // AON_GPIO_15
|
|
+ "-", // AON_GPIO_16
|
|
+
|
|
+ // Pad bank0 out to 32 entries
|
|
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
|
|
+
|
|
+ "HDMI0_SCL", // AON_SGPIO_00
|
|
+ "HDMI0_SDA", // AON_SGPIO_01
|
|
+ "HDMI1_SCL", // AON_SGPIO_02
|
|
+ "HDMI1_SDA", // AON_SGPIO_03
|
|
+ "PMIC_SCL", // AON_SGPIO_04
|
|
+ "PMIC_SDA"; // AON_SGPIO_05
|
|
+
|
|
+ rp1_run_hog {
|
|
+ gpio-hog;
|
|
+ gpios = <2 GPIO_ACTIVE_HIGH>;
|
|
+ output-high;
|
|
+ line-name = "RP1 RUN pin";
|
|
+ };
|
|
+};
|
|
+
|
|
+&rp1_gpio {
|
|
+ gpio-line-names =
|
|
+ "ID_SDA", // GPIO0
|
|
+ "ID_SCL", // GPIO1
|
|
+ "GPIO2", // GPIO2
|
|
+ "GPIO3", // GPIO3
|
|
+ "GPIO4", // GPIO4
|
|
+ "GPIO5", // GPIO5
|
|
+ "GPIO6", // GPIO6
|
|
+ "GPIO7", // GPIO7
|
|
+ "GPIO8", // GPIO8
|
|
+ "GPIO9", // GPIO9
|
|
+ "GPIO10", // GPIO10
|
|
+ "GPIO11", // GPIO11
|
|
+ "GPIO12", // GPIO12
|
|
+ "GPIO13", // GPIO13
|
|
+ "GPIO14", // GPIO14
|
|
+ "GPIO15", // GPIO15
|
|
+ "GPIO16", // GPIO16
|
|
+ "GPIO17", // GPIO17
|
|
+ "GPIO18", // GPIO18
|
|
+ "GPIO19", // GPIO19
|
|
+ "GPIO20", // GPIO20
|
|
+ "GPIO21", // GPIO21
|
|
+ "GPIO22", // GPIO22
|
|
+ "GPIO23", // GPIO23
|
|
+ "GPIO24", // GPIO24
|
|
+ "GPIO25", // GPIO25
|
|
+ "GPIO26", // GPIO26
|
|
+ "GPIO27", // GPIO27
|
|
+
|
|
+ "PCIE_PWR_EN", // GPIO28
|
|
+ "FAN_TACH", // GPIO29
|
|
+ "HOST_SDA", // GPIO30
|
|
+ "HOST_SCL", // GPIO31
|
|
+ "ETH_RST_N", // GPIO32
|
|
+ "PCIE_DET_WAKE", // GPIO33
|
|
+
|
|
+ "CD0_IO0_MICCLK", // GPIO34
|
|
+ "CD0_IO0_MICDAT0", // GPIO35
|
|
+ "RP1_PCIE_CLKREQ_N", // GPIO36
|
|
+ "ETH_IRQ_N", // GPIO37
|
|
+ "SDA0", // GPIO38
|
|
+ "SCL0", // GPIO39
|
|
+ "-", // GPIO40
|
|
+ "-", // GPIO41
|
|
+ "USB_VBUS_EN", // GPIO42
|
|
+ "USB_OC_N", // GPIO43
|
|
+ "RP1_STAT_LED", // GPIO44
|
|
+ "FAN_PWM", // GPIO45
|
|
+ "-", // GPIO46
|
|
+ "2712_WAKE", // GPIO47
|
|
+ "-", // GPIO48
|
|
+ "-", // GPIO49
|
|
+ "-", // GPIO50
|
|
+ "-", // GPIO51
|
|
+ "-", // GPIO52
|
|
+ "-"; // GPIO53
|
|
+
|
|
+ usb_vbus_pins: usb_vbus_pins {
|
|
+ function = "vbus1";
|
|
+ pins = "gpio42", "gpio43";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ aliases: aliases {
|
|
+ blconfig = &blconfig;
|
|
+ bluetooth = &bluetooth;
|
|
+ console = &uart10;
|
|
+ ethernet0 = &rp1_eth;
|
|
+ wifi0 = &wifi;
|
|
+ fb = &fb;
|
|
+ mailbox = &mailbox;
|
|
+ mmc0 = &sdio1;
|
|
+ uart0 = &uart0;
|
|
+ uart1 = &uart1;
|
|
+ uart2 = &uart2;
|
|
+ uart3 = &uart3;
|
|
+ uart4 = &uart4;
|
|
+ uart10 = &uart10;
|
|
+ serial0 = &uart0;
|
|
+ serial1 = &uart1;
|
|
+ serial2 = &uart2;
|
|
+ serial3 = &uart3;
|
|
+ serial4 = &uart4;
|
|
+ serial10 = &uart10;
|
|
+ i2c = &i2c_arm;
|
|
+ i2c0 = &i2c0;
|
|
+ i2c1 = &i2c1;
|
|
+ i2c2 = &i2c2;
|
|
+ i2c3 = &i2c3;
|
|
+ i2c4 = &i2c4;
|
|
+ i2c5 = &i2c5;
|
|
+ i2c6 = &i2c6;
|
|
+ i2c10 = &i2c_rp1boot;
|
|
+ // Bit-bashed i2c_gpios start at 10
|
|
+ spi0 = &spi0;
|
|
+ spi1 = &spi1;
|
|
+ spi2 = &spi2;
|
|
+ spi3 = &spi3;
|
|
+ spi4 = &spi4;
|
|
+ spi5 = &spi5;
|
|
+ spi10 = &spi10;
|
|
+ gpio0 = &gpio;
|
|
+ gpio1 = &gio;
|
|
+ gpio2 = &gio_aon;
|
|
+ gpio3 = &pinctrl;
|
|
+ gpio4 = &pinctrl_aon;
|
|
+ usb0 = &rp1_usb0;
|
|
+ usb1 = &rp1_usb1;
|
|
+ drm-dsi1 = &dsi0;
|
|
+ drm-dsi2 = &dsi1;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ bdaddr = <&bluetooth>, "local-bd-address[";
|
|
+ button_debounce = <&pwr_key>, "debounce-interval:0";
|
|
+ cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
|
|
+ uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
|
|
+ i2c0 = <&i2c0>, "status";
|
|
+ i2c1 = <&i2c1>, "status";
|
|
+ i2c = <&i2c1>, "status";
|
|
+ i2c_arm = <&i2c_arm>, "status";
|
|
+ i2c_vc = <&i2c_vc>, "status";
|
|
+ i2c_csi_dsi = <&i2c_csi_dsi>, "status";
|
|
+ i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
|
|
+ i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
|
|
+ i2c0_baudrate = <&i2c0>, "clock-frequency:0";
|
|
+ i2c1_baudrate = <&i2c1>, "clock-frequency:0";
|
|
+ i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
|
|
+ i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
|
|
+ i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
|
|
+ krnbt = <&bluetooth>, "status";
|
|
+ nvme = <&pciex1>, "status";
|
|
+ pciex1 = <&pciex1>, "status";
|
|
+ pciex1_gen = <&pciex1> , "max-link-speed:0";
|
|
+ pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
|
|
+ pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
|
|
+ pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
|
|
+ random = <&random>, "status";
|
|
+ rtc = <&rpi_rtc>, "status";
|
|
+ rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
|
|
+ spi = <&spi0>, "status";
|
|
+ suspend = <&pwr_key>, "linux,code:0=205";
|
|
+ uart0 = <&uart0>, "status";
|
|
+ wifiaddr = <&wifi>, "local-mac-address[";
|
|
+
|
|
+ act_led_activelow = <&led_act>, "active-low?";
|
|
+ act_led_trigger = <&led_act>, "linux,default-trigger";
|
|
+ pwr_led_activelow = <&led_pwr>, "gpios:8";
|
|
+ pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
|
|
+ eth_led0 = <&phy1>,"led-modes:0";
|
|
+ eth_led1 = <&phy1>,"led-modes:4";
|
|
+ drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
|
|
+ drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
|
|
+ drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
|
|
+ drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
|
|
+ drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
|
|
+ drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
|
|
+ drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
|
|
+ drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
|
|
+ drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
|
|
+ drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
|
|
+ drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
|
|
+ drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
|
|
+
|
|
+ fan_temp0 = <&cpu_tepid>,"temperature:0";
|
|
+ fan_temp1 = <&cpu_warm>,"temperature:0";
|
|
+ fan_temp2 = <&cpu_hot>,"temperature:0";
|
|
+ fan_temp3 = <&cpu_vhot>,"temperature:0";
|
|
+ fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
|
|
+ fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
|
|
+ fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
|
|
+ fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
|
|
+ fan_temp0_speed = <&fan>, "cooling-levels:4";
|
|
+ fan_temp1_speed = <&fan>, "cooling-levels:8";
|
|
+ fan_temp2_speed = <&fan>, "cooling-levels:12";
|
|
+ fan_temp3_speed = <&fan>, "cooling-levels:16";
|
|
+ };
|
|
+};
|
|
--- a/arch/arm64/boot/dts/broadcom/Makefile
|
|
+++ b/arch/arm64/boot/dts/broadcom/Makefile
|
|
@@ -22,6 +22,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4s.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-5-b.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2712d0-rpi-5-b.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm5io.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm4io.dtb
|
|
|
|
subdir-y += bcmbca
|
|
subdir-y += northstar2
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
|
|
@@ -0,0 +1,2 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include "arm/broadcom/bcm2712-rpi-cm5-cm4io.dts"
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
|
|
@@ -0,0 +1,2 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include "arm/broadcom/bcm2712-rpi-cm5-cm5io.dts"
|