forked from Openwrt/openwrt
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
86 lines
2.3 KiB
Diff
86 lines
2.3 KiB
Diff
From 6a747c331be8221f74feb2a56daa13e8037ec96c Mon Sep 17 00:00:00 2001
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From: Rodrigo Rosmaninho <quico.rosmaninho@gmail.com>
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Date: Tue, 23 Jan 2024 18:50:19 +0000
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Subject: [PATCH 0860/1085] Add pcie-32bit-dma-overlay-pi5 to enable 32bit DMA
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on the Pi 5's external PCIe
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Changes dma-ranges in the pcie1 component of the bcm2712 dts in order to ensure that the DMA addressing space is 32bits, at the expense of having to bounce buffers.
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Signed-off-by: Rodrigo Rosmaninho <r.rosmaninho@ua.pt>
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 6 +++++
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arch/arm/boot/dts/overlays/overlay_map.dts | 5 ++++
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.../overlays/pcie-32bit-dma-pi5-overlay.dts | 26 +++++++++++++++++++
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4 files changed, 38 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -183,6 +183,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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pca953x.dtbo \
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pcf857x.dtbo \
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pcie-32bit-dma.dtbo \
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+ pcie-32bit-dma-pi5.dtbo \
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pibell.dtbo \
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pifacedigital.dtbo \
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pifi-40.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -3394,6 +3394,12 @@ Load: dtoverlay=pcie-32bit-dma
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Params: <None>
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+Name: pcie-32bit-dma-pi5
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+Info: Force PCIe config to support 32bit DMA addresses at the expense of
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+ having to bounce buffers (on the Pi 5).
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+Load: dtoverlay=pcie-32bit-dma-pi5
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+Params: <None>
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+
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[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
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--- a/arch/arm/boot/dts/overlays/overlay_map.dts
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+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
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@@ -185,6 +185,11 @@
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pcie-32bit-dma {
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bcm2711;
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+ bcm2712 = "pcie-32bit-dma-pi5";
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+ };
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+
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+ pcie-32bit-dma-pi5 {
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+ bcm2712;
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};
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pi3-act-led {
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts
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@@ -0,0 +1,26 @@
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+/*
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+ * pcie-32bit-dma-pi5-overlay.dts
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "brcm,bcm2712";
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+
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+ fragment@0 {
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+ target = <&pcie1>;
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+ __overlay__ {
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+ /*
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+ * The size of the range is rounded up to a power of 2,
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+ * so the range ends up being 0-4GB, and the MSI vector
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+ * gets pushed beyond 4GB.
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+ */
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
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+ 0x0 0x80000000>;
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+ };
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+ };
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+
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+};
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